UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 452
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UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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78K0R/Kx3-L
8.7.2 Operation as external event counter
(external event) is detected in the TImn pin. When a specified count value is reached, the event counter generates an
interrupt. The specified number of counts can be calculated by the following expression.
of timer channel start register m (TSm) to 1.
0000H, the TCRmn register loads the value of the TDRmn register again, and outputs INTTMmn.
TOEmn bit of timer output enable register m (TOEm) to 0.
count period.
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
Remark m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7)
The timer array unit can be used as an external event counter that counts the number of times the valid input edge
Timer/counter register mn (TCRmn) operates as a down counter in the event counter mode.
The TCRmn register loads the value of timer data register mn (TDRmn) by setting any channel start trigger bit (TSmn)
The TCRmn register counts down each time the valid input edge of the TImn pin has been detected. When TCRmn =
After that, the above operation is repeated.
An irregular waveform that depends on external events is output from the TOmn pin. Stop the output by setting the
The TDRmn register can be rewritten at any time. The new value of the TDRmn register becomes valid during the next
Specified number of counts = Set value of TDRmn + 1
TImn pin
78K0R/KC3-L (40-pin):
78K0R/KC3-L (44-pin, 48-pin):
78K0R/KD3-L, 78K0R/KE3-L:
78K0R/KF3-L, 78K0R/KG3-L:
TSmn
detection
Figure 8-45. Block Diagram of Operation as External Event Counter
Edge
mn = 02 to 07
mn = 00 to 07
mn = 00 to 07
mn = 00 to 07, 10 to 13
register mn (TCRmn)
register mn (TDRmn)
Timer counter
Timer data
CHAPTER 8 TIMER ARRAY UNIT
controller
Interrupt
Interrupt signal
(INTTMmn)
452
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