UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 438
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UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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- Download datasheet (8Mb)
78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
(2) Default level of TOmn pin and output level after timer operation start
(a) When operation starts with master channel output mode (TOMmn = 0) setting
The change in the output level of the TOmn pin when timer output register m (TOm) is written while timer output is
disabled (TOEmn = 0), the initial level is changed, and then timer output is enabled (TOEmn = 1) before port
output is enabled, is shown below.
Remarks 1. Toggle:
(Same output waveform as TOLmn = 0)
(Same output waveform as TOLmn = 0)
The setting of timer output level register m (TOLm) is invalid when master channel output mode (TOMmn = 0).
When the timer operation starts after setting the default level, the toggle signal is generated and the output
level of the TOmn pin is reversed.
2. m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7)
However, in case of the timer output pin (TOmn), mn changes as below.
78K0R/KC3-L (40-pin):
78K0R/KC3-L (44-pin, 48-pin): mn = 00 to 07
78K0R/KD3-L, 78K0R/KE3-L:
78K0R/KF3-L, 78K0R/KG3-L:
Default level, TOLmn setting
Figure 8-32. TOmn Pin Output Status at Toggle Output (TOMmn = 0)
TOmn = 0, TOLmn = 0
TOmn = 1, TOLmn = 0
TOmn = 0, TOLmn = 1
TOmn = 1, TOLmn = 1
Reverse TOmn pin output status
TOEmn
Port output is enabled
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Dependent on TOmn setting
mn = 02 to 07
mn = 00 to 07
mn = 00 to 07, 10 to 13
Toggle
Toggle
Independent of TOLmn setting
TOmn pin transition
CHAPTER 8 TIMER ARRAY UNIT
Toggle
Toggle
Toggle
438
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