UPD78F1001GB-GAF-AX Renesas Electronics America, UPD78F1001GB-GAF-AX Datasheet - Page 33
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UPD78F1001GB-GAF-AX
Manufacturer Part Number
UPD78F1001GB-GAF-AX
Description
MCU 16BIT 78K0R/KX3-L 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Kx3-Lr
Datasheet
1.UPD78F1000GB-GAF-AX.pdf
(1171 pages)
Specifications of UPD78F1001GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1001GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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- Download datasheet (8Mb)
78K0R/Kx3-L
R01UH0106EJ0300 Rev.3.00
Oct 01, 2010
• 100-pin plastic LQFP (fine pitch) (14 × 14)
Note
Cautions 1. Make AV
Remarks 1. When using the microcontroller for an application where the noise generated inside the microcontroller
P141/PCLBUZ1/INTP7
P140/PCLBUZ0/INTP6
P46/INTP1/TI05/TO05
P142/SCK20/SCL20
P120/INTP0/EXLVI
P122/X2/EXCLK
P42/TI04/TO04
SCK40, SCK41, SI40, SI41, SO40, SO41, TxD4, RxD4 pins are only mounted in the 48-pin products of the
PD78F1029 and 78F1030.
2. Make EV
3. Connect the REGC pin to Vss via a capacitor (0.47 to 1
4. P20/ANI0 to P27/ANI7 and P150/ANI8 to P157/ANI15 are set as analog inputs in the order of
2. For pin identification, see 1.5 Pin Identification.
P41/TOOL1
P40/TOOL0
P43/SCK01
P47/INTP2
P61/SDA0
P45/SO01
P60/SCL0
P124/XT2
P123/XT1
P157/ANI15, …, P150/ANI8, P27/ANI7, …, P20/ANI0 by the A/D port configuration register (ADPC).
When using P20/ANI0 to P27/ANI7 and P150/ANI8 to P157/ANI15 as analog inputs, start designing
from P157/ANI15 (see 13.3 (6) A/D port configuration register (ADPC) for details).
must be reduced, it is recommended to supply separate powers to the V
connect the V
P44/SI01
P121/X1
RESET
FLMD0
REGC
EV
EV
V
V
DD0
SS0
DD
SS
SS
DD0
, EV
and EV
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
SS0
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
and two EV
, and EV
DD1
the same potential as V
SS1
SS
pins to separate ground lines.
the same potential as V
DD
.
SS
.
μ
F: target).
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
DD
CHAPTER 1 OUTLINE
and two EV
P157/ANI15
AV
AV
P111
P110
P91
P10/SCK00
P11/SI00/RxD0
P12/SO00/TxD0
P13/TxD3
P14/RxD3
P15/RTCDIV/RTCCL
P16/TI01/TO01/INTP5
P17/TI02/TO02
P57
P56
P55/SO41
P54/SI41
P53/SCK41
P52/SO40
P51/SI40
P50/SCK40
EV
P30/INTP3/RTC1HZ
P87
SS
REF
DD1
Note
Note
Note
Note
Note
Note
/RxD4
/TxD4
DD
pins and
Note
Note
33
μ
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