HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 545

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Thus the reception margin in asynchronous mode is given by the following formula.
Formula for reception margin in smart card interface mode
Where M: Reception margin (%)
Assuming values of F = 0, D = 0.5 and N = 372 in the above formula, the reception margin
formula is as follows.
When D = 0.5 and F = 0,
N: Ratio of bit rate to clock (N = 32, 64, 372, and 256)
D: Clock duty (D = 0 to 1.0)
L: Frame length (L = 10)
F: Absolute value of clock frequency deviation
M = (0.5 – 1/2
M = (0.5 –
= 49.866%
2N
1
372)
) – (L – 0.5) F –
100%
 D – 0.5
N
Rev. 5.00 Jan 10, 2006 page 519 of 1042
(1 + F  100%
Section 14 Smart Card Interface
REJ09B0275-0500

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