HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 751

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

21B.2.4 Timer Control/Status Register (TCSR)
Note:
TCSR is an 8-bit read/write register that selects the clock input to WDT1 TCNT and the mode.
Here, we describe bit 4. For details of the other bits in this register, see section 12.2.2, Timer
Control/Status Register (TCSR).
The TCSR is initialized to H'00 at a reset and when in hardware standby mode. It is not initialized
in software standby mode.
Bit 4—Prescaler select (PSS): This bit selects the clock source input to WDT1 TCNT.
It also controls operation when shifting low power dissipation modes. The operating mode
selected after the SLEEP instruction is executed is determined in combination with other control
bits.
For details, see the description for clock selection in section 12.2.2, Timer Control/Status Register
(TCSR), and this section.
Note:
Bit 4
PSS
0
1
Bit
Initial value :
R/W
* Only write 0 to clear the flag.
* Always set high-speed mode when shifting to watch mode or sub-active mode.
Description
TCNT counts the divided clock from the
When the SLEEP instruction is executed in high-speed mode or medium-speed
mode, operation shifts to sleep mode or software standby mode.
TCNT counts the divided clock from the subclock-based prescaler (PSS).
When the SLEEP instruction is executed in high-speed mode or medium-speed
mode, operation shifts to sleep mode, watch mode * , or sub-active mode * .
When the SLEEP instruction is executed in sub-active mode * , operation shifts to
sub-sleep mode * , watch mode * , or high-speed mode.
:
:
R/(W) *
OVF
7
0
WT/IT
R/W
6
0
TME
R/W
5
0
Section 21B Power-Down Modes [H8S/2626 Group]
PSS
R/W
4
0
-based prescaler (PSM).
Rev. 5.00 Jan 10, 2006 page 725 of 1042
RST/NMI
R/W
3
0
CKS2
R/W
2
0
REJ09B0275-0500
CKS1
R/W
1
0
(Initial value)
CKS0
R/W
0
0