HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 945

IC H8S MCU FLASH 256K 100-QFP

HD64F2623FA20J

Manufacturer Part Number
HD64F2623FA20J
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2623FA20J

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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TCR3—Timer Control Register 3
Bit
Initial value
Read/Write
Notes: 1. Synchronous operation setting is performed by setting the SYNC bit in TSYR to 1.
Counter clear
0
1
0
1
0
1
2. When TGRC or TGRD is used as a buffer register, TCNT is not cleared because the
0
1
0
1
0
1
0
1
:
:
:
buffer register setting has priority, and compare match/input capture does not occur.
TCNT clearing disabled
TCNT cleared by TGRA compare match/input capture
TCNT cleared by TGRB compare match/input capture
TCNT cleared by counter clearing for another channel
performing synchronous clearing/synchronous operation
TCNT clearing disabled
TCNT cleared by TGRC compare match/input capture
TCNT cleared by TGRD compare match/input capture
TCNT cleared by counter clearing for another channel
performing synchronous clearing/synchronous operation
CCLR2
R/W
7
0
CCLR1
R/W
6
0
Input clock edge select
Note: Internal clock edge selection is valid when the
CCLR0
0
1
R/W
5
0
0
1
Timer prescaler
input clock is /4 or slower. This setting is ignored
if is /1 is selected as the input clock.
0
1
Count at rising edge
Count at falling edge
Count at both edges
CKEG1
0
1
0
1
R/W
4
0
0
1
0
1
0
1
0
1
Internal clock: counts on /1
Internal clock: counts on /4
Internal clock: counts on /16
Internal clock: counts on /64
External clock: counts on TCLKA pin input
Internal clock: counts on /1024
Internal clock: counts on /256
Internal clock: counts on /4096
H'FE80
Rev. 5.00 Jan 10, 2006 page 919 of 1042
CKEG0
R/W
3
0
Appendix B Internal I/O Register
TPSC2
*2
*2
R/W
*1
*1
2
0
TPSC1
R/W
REJ09B0275-0500
1
0
TPSC0
R/W
0
0
TPU3

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