HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 644

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 17 D/A Converter [Provided in the H8S/2626 Group only]
17.2.3
MSTPCRC is an 8-bit readable/writable register that performs module stop mode control.
When the MSTPC5 bit is set to 1, D/A converter operation is stopped at the end of the bus cycle,
and module stop mode is entered. Register read/write accesses are not possible in module stop
mode. For details, see section 21B.5, Module Stop Mode.
MSTPCRC is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 5—Module Stop (MSTPC5): Specifies module stop mode for the D/A converter (channels 2
and 3).
Bit 5
MSTPC5
0
1
17.3
The D/A converter has two built-in D/A conversion circuits that can perform conversion
independently.
D/A conversion is performed constantly while enabled in DACR23. If the DADR2 or DADR3
value is modified, conversion of the new data begins immediately. The conversion results are
output when bits DAOE0 and DAOE1 are set to 1.
An example of D/A conversion on channel 2 is given below. The timing is shown in figure 17.2.
1. Data to be converted is written in DADR2.
2. Bit DAOE0 is set to 1 in DACR23. D/A conversion starts and DA2 becomes an output pin.
Rev. 5.00 Jan 10, 2006 page 618 of 1042
REJ09B0275-0500
Bit
Initial value :
R/W
The conversion result is output after the conversion time. The output value is (DADR2
contents/256)
modified or the DAOE0 bit is cleared to 0.
Module Stop Control Register C (MSTPCRC)
Operation
Description
D/A converter (channels 2 and 3) module stop mode is cleared
D/A converter (channels 2 and 3) module stop mode is set
:
:
MSTPC7 MSTPC6 MSTPC5 MSTPC4 MSTPC3 MSTPC2 MSTPC1 MSTPC0
R/W
Vref. Output of this conversion result continues until the value in DADR2 is
7
1
R/W
6
1
R/W
5
1
R/W
4
1
R/W
3
1
R/W
2
1
R/W
1
1
(Initial value)
R/W
0
1