HD64F2623FA20J Renesas Electronics America, HD64F2623FA20J Datasheet - Page 998

• Manufacturer Part Number: HD64F2623FA20J
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2623FA20J

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Appendix B Internal I/O Register
SCR0—Serial Control Register 0
Rev. 5.00 Jan 10, 2006 page 972 of 1042
REJ09B0275-0500
Bit
Initial value
Read/Write
Note: For details of how to clear interrupt requests, see section 13.2.6, Serial Control Register (SCR).
Transmit interrupt enable
0 Transmit data empty interrupt (TXI) request disabled
1
:
:
:
Transmit data empty interrupt (TXI) request enabled
R/W
TIE
7
0
Receive interrupt enable
0 Receive data full interrupt (RXI) request and receive error interrupt (ERI) request disabled
1
Receive data full interrupt (RXI) request and receive error interrupt (ERI) request enabled
R/W
RIE
6
0
Transmit enable
0 Transmission disabled
1
Transmission enabled
Receive enable
0 Reception disabled
1
R/W
TE
Reception enabled
Multiprocessor interrupt enable
5
0
0 Multiprocessor interrupts disabled
1
[Clearing conditions]
• When the MPIE bit is cleared to 0
• When data with MPB = 1 is received
Multiprocessor interrupts enabled
Receive interrupt (RXI) requests, receive error interrupt (ERI)
requests, and setting of the RDRF, FER, and ORER flags in SSR are
disabled until data with the multiprocessor bit set to 1 is received
Transmit end interrupt enable
0 Transmit end interrupt (TEI) request disabled
1
R/W
Notes: 1.
Transmit end interrupt (TEI) request enabled
Clock enable
RE
0
1
4
0
0
1
0
1
2.
Asynchronous
mode
Synchronous
mode
Asynchronous
mode
Synchronous
mode
Asynchronous
mode
Synchronous
mode
Asynchronous
mode
Synchronous
mode
H'FF7A
Outputs a clock of the same frequency as the bit rate.
Inputs a clock with a frequency 16 times the bit rate.
MPIE
R/W
3
0
Internal clock/SCK pin functions as
I/O port
Internal clock/SCK pin functions as
serial clock output
Internal clock/SCK pin functions as
clock output
Internal clock/SCK pin functions as
serial clock output
External clock/SCK pin functions as
clock input
External clock/SCK pin functions as
serial clock input
External clock/SCK pin functions as
clock input
External clock/SCK pin functions as
serial clock input
TEIE
R/W
2
0
*2
*2
*1
CKE1
R/W
1
0
CKE0
R/W
0
0
SCI0