L6460 STMicroelectronics, L6460 Datasheet - Page 117

MOSFET & Power Driver ICs SPI Config Stepper DC Multi Motor DRV

L6460

Manufacturer Part Number
L6460
Description
MOSFET & Power Driver ICs SPI Config Stepper DC Multi Motor DRV
Manufacturer
STMicroelectronics
Type
Full-Bridge Driverr
Datasheet

Specifications of L6460

Product
Half-Bridge Drivers
Rise Time
0.4 us
Fall Time
0.4 us
Supply Voltage (max)
38 V
Supply Voltage (min)
13 V
Supply Current
11 mA
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Number Of Drivers
4
Output Current
10 mA
Output Voltage
30 V
Package / Case
TQFP-64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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L6460
22.10
GPIO[9]
The GPIO[9] truth table is (for the abbreviation list please refer to
Table 50.
1. The Op1EnPlusPin bit in the OpAmp1Ctrl register enables the connection of the positive input of Op1 to
2. The GPIO[9] pin is used by the system when firmware requires the ID read action
3. When Op1EnPlusPin = ‘1’ the GpioOutEnable[9] bit is forced to 0.
4. In all configurations in which GPIO[9] is enabled as output:
Op1EnPlusPin
GPIO[9] pin.
a)the GPIO[9] pin can be always used as an analog input to the ADC system (ADC function) by writing its
b) the GPIO[9] pin can be always used as a digital input so its value can be always read through SPI
c)please note that GPIO[9] output is directly connected to ExtPWM1 input for Bridge 1 or 2 and therefore
d)the GPIO[9] pin is a rail to rail output supplied by V
address in the A2DChannelX[4:0] in the A2DConfigX register and starting a conversion;
interface (SPI_IN function);
particular care must be taken in order to avoid wrong PWM signals when ExtPWM1 is selected for
bridge 1 or 2;
1
0
0
0
0
0
0
0
0
GPIO[9] truth table
(1)
enable[9]
GpioOut
X
0
1
1
1
1
1
1
1
Doc ID 17713 Rev 1
Mode[2] Mode[1] Mode[0]
GPIO[9] SPI bits
X
X
0
0
0
0
1
1
1
X
X
0
0
1
1
0
0
1
GPIO_SPI.
X
X
0
1
0
1
0
1
1
Interrupt Ctrl inverted
Reg Loop 3 inverted
AuxPwm2 inverted
Table
HiZ (SPI_IN)
OpAmp1 in+
Interrupt Ctrl
Function
Reg Loop 3
AuxPwm2
SPI OUT
(Chapter
40).
(2)
25)
GPIO pins
117/139
Note
(3)
(4)
(4)
(4)
(4)
(4)
(4)
(4)

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