L6460 STMicroelectronics, L6460 Datasheet - Page 93

• Manufacturer Part Number: L6460
• Description: MOSFET & Power Driver ICs SPI Config Stepper DC Multi Motor DRV
• Manufacturer: STMicroelectronics
• Type: Full-Bridge Driverr

Specifications of L6460

• Product: Half-Bridge Drivers
• Rise Time: 0.4 us
• Fall Time: 0.4 us
• Supply Voltage (max): 38 V
• Supply Voltage (min): 13 V
• Supply Current: 11 mA
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Drivers: 4
• Output Current: 10 mA
• Output Voltage: 30 V
• Package / Case: TQFP-64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

L6460
21
Digital comparator
L6460 includes one digital comparator that can be used to signal, through serial interface,
that a channel converted by the ADC is greater, greater-equal, lesser, lesser equal, or equal
than a fixed value set by serial interface or than the value converted by the other ADC
channel.
This circuit can be used to monitor the temperature of the IC advising the firmware when it
reaches a certain value decided by the firmware by setting one ADC channel to do
continuous conversions of the temperature sensor.
The circuit operation can be enabled or disabled changing the EnDigCmp bit in the
configuration register DigCmpCfg. By setting the DigCmpUpdate[1:0] bits in the
configuration register, the comparator can be programmed to update its output in one of the
following ways:
●
●
●
●
When the last option is selected, the digital comparator will update its output in two different
ways depending on the configuration of the ADC converter. If ADC converter is configured to
do continuous conversions on both channels, the output of the comparator will be updated
when the double conversion is completed. If ADC converter is not configured to do
continuous conversions on both channels, the output of the comparator will be updated each
time a conversion is completed.
The comparator output can be digitally filtered so that the programmed condition has to be
found for three consecutive checks before to be signaled.
The
Figure 29
DigCmpUpdate[1:0]=00
–
DigCmpUpdate[1:0]=01
–
DigCmpUpdate[1:0]=10
–
DigCmpUpdate[1:0]=11
–
Continuously (each clock).
Each time a conversion is performed on ADC channel 0.
Each time a conversion is performed on ADC channel 1.
ADC state machine driven.
shows the block diagram of digital comparator.
Doc ID 17713 Rev 1
Digital comparator
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