L6460 STMicroelectronics, L6460 Datasheet - Page 32

• Manufacturer Part Number: L6460
• Description: MOSFET & Power Driver ICs SPI Config Stepper DC Multi Motor DRV
• Manufacturer: STMicroelectronics
• Type: Full-Bridge Driverr

Specifications of L6460

• Product: Half-Bridge Drivers
• Rise Time: 0.4 us
• Fall Time: 0.4 us
• Supply Voltage (max): 38 V
• Supply Voltage (min): 13 V
• Supply Current: 11 mA
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Drivers: 4
• Output Current: 10 mA
• Output Voltage: 30 V
• Package / Case: TQFP-64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Supervisory system
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5.1
5.2
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Supervisory system
The supervisory circuitry monitors the state of several functions inside L6460 and resets the
device (and other ICs if connected to nRESET pin) when the monitored functions are
outside their normal range. Supervisory circuitry can be divided into three main blocks:
POR circuitry monitors the voltages that L6460 needs to guarantee its own functionality;
nRESET circuitry controls if L6460’s main voltages are inside the normal range; TSD is the
thermal shut down of the chip in case of overheating.
Power on reset (POR) circuit
Power on reset circuit monitors V
set the device is in a stable and controlled status until the minimum supply voltages that
guarantee the device functionality are reached. The output signal of this circuit (in the
following indicated as “POR”) becomes active when V
threshold.
When POR output signal is active, all functions and all flags inside L6460 are set in their
reset state; once POR signal comes back from off state (meaning monitored voltages are
above their rising threshold), the power up sequence is re-initialized.
nRESET generation circuit
The nRESET circuit monitors V
(V
monitored voltages reach their operative value (please note that V
so it must be above its minimum value, otherwise nRESET circuit is not active).
This circuit generates an internal reset signal (in the following indicated as “nRST_int”) that
will also be signaled to external circuits by pulling low the nRESET pin.
The signal nRST_int becomes active in the following cases:
1.
2.
3.
4.
When an nRST_int event is caused by above cases, the nRESET pin will stay low for a
“stretch” time that starts from the moment that nRST_int signal returns in the operative
System
–
–
–
When one of the following voltages is lower than its own under voltage threshold:
–
–
–
–
When watchdog timer counter (see
if watchdog function is enabled).
When L6460 is in “Low Power mode”.
When EnExtSoftRst bit in SoftResReg register is at logic level = “1” and a “SoftRes”
command is applied (see SoftResReg register description in
) voltages. The purpose of this circuit is to prevent the device functionality until the
Power on reset (POR) generation circuitry.
nRESET (nRST_int) generation circuitry.
Thermal shut down (TSD) generation circuitry.
V
V
V
V
GPIO_SPI
Supply
Pump
System
.
and V
(all switching or linear system regulators voltages).
.
SupplyInt
Doc ID 17713 Rev 1
.
Supply
Supply
, V
, and V
SupplyInt
Chapter
3V3
, V
6) elapse the watchdog timeout time (only
voltages. The purpose of this circuit is to
Pump
Supply
, V
GPIO_SPI
or V
3V3
Chapter
and all system regulators
3v3
go under their falling
is monitored by POR,
25).
L6460