L6460 STMicroelectronics, L6460 Datasheet - Page 35

• Manufacturer Part Number: L6460
• Description: MOSFET & Power Driver ICs SPI Config Stepper DC Multi Motor DRV
• Manufacturer: STMicroelectronics
• Type: Full-Bridge Driverr

Specifications of L6460

• Product: Half-Bridge Drivers
• Rise Time: 0.4 us
• Fall Time: 0.4 us
• Supply Voltage (max): 38 V
• Supply Voltage (min): 13 V
• Supply Current: 11 mA
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Drivers: 4
• Output Current: 10 mA
• Output Voltage: 30 V
• Package / Case: TQFP-64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

L6460
5.3
Thermal shut down generation circuit
The third component of the supervisory circuit is the thermal shut down generation circuit.
This circuit generates two different flags depending on the IC temperature:
When a TSD event occurs, L6460 will enter in the reset state placing the bridges in high
impedance and turning off all regulators and other circuits until the internal temperature
decreases below the Warm temperature. At this point, L6460 will restart the power up
sequence and TSD bit will be set and will be readable as soon as L6460 will come out from
the reset state.
This TSD bit can be reset in three ways:
The Warm bit, set by L6460 when IC is working over the warming temperature, can be read
using the SPI interface. Once this bit is set it can be reset in three ways:
The thermal sensor voltage can be converted using the internal A/D: this way the
microcontroller can directly measure the IC temperature.
To avoid unwanted commutation especially when temperature is near the thresholds, the
output signal is filtered for both TSD and Warm.
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the “TSD” flag indicates that the IC temperature is greater than the maximum
allowable temperature.
the “Warm” flag, that can be read using serial interface, becomes active at a lower
temperature respect to TSD signal, therefore it can be used to prevent the IC from
reaching over temperature.
by writing a logic level ‘1’ in the ClearTSD bit in the ICTemp register (see
Chapter
by a POR event;
by entering in “Low Power Mode”.
by writing a logic level ‘1’ in the ClearWarm bit;
by a POR event;
by entering in “Low Power Mode”.
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Doc ID 17713 Rev 1
Supervisory system
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