ATTINY861A-SU Atmel, ATTINY861A-SU Datasheet - Page 161

• Manufacturer Part Number: ATTINY861A-SU
• Description: IC, MCU, 8BIT, 8K FLASH, 20SOIC
• Manufacturer: Atmel

Specifications of ATTINY861A-SU

• Controller Family/series: ATtiny
• No. Of I/o's: 16
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 512Byte
• Cpu Speed: 20MHz
• No.: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 8KB
• Oscillator Type: External, Internal
• Rohs Compliant: Yes

16.4
16.5
16.6
16.6.1
8197B–AVR–01/10
Software Break Points
Limitations of debugWIRE
Register Description
DWDR – debugWire Data Register
debugWIRE supports Program memory Break Points by the AVR Break instruction. Setting a
Break Point in AVR Studio
tion replaced by the BREAK instruction will be stored. When program execution is continued, the
stored instruction will be executed before continuing from the Program memory. A break can be
inserted manually by putting the BREAK instruction in the program.
The Flash must be re-programmed each time a Break Point is changed. This is automatically
handled by AVR Studio through the debugWIRE interface. The use of Break Points will therefore
reduce the Falsh Data retention. Devices used for debugging purposes should not be shipped to
end customers.
The debugWIRE communication pin (dW) is physically located on the same pin as External
Reset (RESET). An External Reset source is therefore not supported when the debugWIRE is
enabled.
The debugWIRE system accurately emulates all I/O functions when running at full speed, i.e.,
when the program in the CPU is running. When the CPU is stopped, care must be taken while
accessing some of the I/O Registers via the debugger (AVR Studio). See the debugWIRE docu-
mentation for detailed description of the limitations.
The debugWIRE interface is asynchronous, which means that the debugger needs to synchro-
nize to the system clock. If the system clock is changed by software (e.g. by writing CLKPS bits)
communication via debugWIRE may fail. Also, clock frequencies below 100 kHz may cause
communication problems.
A programmed DWEN Fuse enables some parts of the clock system to be running in all sleep
modes. This will increase the power consumption while in sleep. Thus, the DWEN Fuse should
be disabled when debugWire is not used.
The following section describes the registers used with the debugWire.
The DWDR Register provides a communication channel from the running program in the MCU
to the debugger. This register is only accessible by the debugWIRE and can therefore not be
used as a general purpose register in the normal operations.
Bit
0x20 (0x40)
Read/Write
Initial Value
• Pull-Up resistor on the dW/(RESET) line must be in the range of 10k to 20 kΩ. However, the
• Connecting the RESET pin directly to V
• Capacitors inserted on the RESET pin must be disconnected when using debugWire.
• All external reset sources must be disconnected.
pull-up resistor is optional.
7
R/W
0
6
R/W
0
®
will insert a BREAK instruction in the Program memory. The instruc-
5
R/W
0
4
R/W
0
CC
DWDR[7:0]
will not work.
3
R/W
0
2
R/W
0
1
R/W
0
0
R/W
0
DWDR
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