ATTINY861A-SU Atmel, ATTINY861A-SU Datasheet - Page 46

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ATTINY861A-SU

Manufacturer Part Number
ATTINY861A-SU
Description
IC, MCU, 8BIT, 8K FLASH, 20SOIC
Manufacturer
Atmel
Datasheet

Specifications of ATTINY861A-SU

Controller Family/series
ATtiny
No. Of I/o's
16
Eeprom Memory Size
512Byte
Ram Memory Size
512Byte
Cpu Speed
20MHz
No.
RoHS Compliant
Core Size
8bit
Program Memory Size
8KB
Oscillator Type
External, Internal
Rohs Compliant
Yes

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY861A-SUR
Manufacturer:
Atmel
Quantity:
950
46
ATtiny261A/461A/861A
the next time-out will generate a reset. To avoid the Watchdog Reset, WDIE must be set after
each interrupt.
Table 8-2.
• Bit 4 – WDCE: Watchdog Change Enable
This bit must be set when the WDE bit is written to logic zero. Otherwise, the Watchdog will not
be disabled. Once written to one, hardware will clear this bit after four clock cycles. Refer to the
description of the WDE bit for a Watchdog disable procedure. This bit must also be set when
changing the prescaler bits.
Watchdog Timer” on page 43.
• Bit 3 – WDE: Watchdog Enable
When the WDE is written to logic one, the Watchdog Timer is enabled, and if the WDE is written
to logic zero, the Watchdog Timer function is disabled. WDE can only be cleared if the WDCE bit
has logic level one. To disable an enabled Watchdog Timer, the following procedure must be
followed:
In safety level 2, it is not possible to disable the Watchdog Timer, even with the algorithm
described above.
Timer” on page 43.
In safety level 1, WDE is overridden by WDRF in MCUSR. See
ter” on page 45
To clear WDE, WDRF must be cleared before disabling the Watchdog with the procedure
described above. This feature ensures multiple resets during conditions causing failure, and a
safe start-up after the failure.
Note:
• Bits 5, 2:0 – WDP3:0: Watchdog Timer Prescaler 3, 2, 1, and 0
1. In the same operation, write a logic one to WDCE and WDE. A logic one must be writ-
2. Within the next four clock cycles, write a logic 0 to WDE. This disables the Watchdog.
WDE
0
0
1
1
ten to WDE even though it is set to one before the disable operation starts.
If the watchdog timer is not going to be used in the application, it is important to go through a
watchdog disable procedure in the initialization of the device. If the Watchdog is accidentally
enabled, for example by a runaway pointer or brown-out condition, the device will be reset, which
in turn will lead to a new watchdog reset. To avoid this situation, the application software should
always clear the WDRF flag and the WDE control bit in the initialization routine.
Watchdog Timer Configuration
for description of WDRF. This means that WDE is always set when WDRF is set.
WDIE
0
1
0
1
See “Timed Sequences for Changing the Configuration of the Watchdog
Watchdog Timer State
Stopped
Running
Running
Running
See “Timed Sequences for Changing the Configuration of the
Action on Time-out
None
Interrupt
Reset
Interrupt
“MCUSR – MCU Status Regis-
8197B–AVR–01/10

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