UPD78F0413GA-GAM-AX NEC, UPD78F0413GA-GAM-AX Datasheet - Page 441

• Manufacturer Part Number: UPD78F0413GA-GAM-AX
• Description: 8BIT UC, 32K FLASH, 1KB RAM, LCD
• Manufacturer: NEC

Specifications of UPD78F0413GA-GAM-AX

• Controller Family/series: UPD78F
• No. Of I/o's: 30
• Ram Memory Size: 1024Byte
• Cpu Speed: 10MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 32KB
• Oscillator Type: External, Internal

(1) Interrupt request flag registers (IF0L, IF0H, IF1L, IF1H)
Note
Cautions 1. Be sure to clear bits 5 and 6 of IF0L, and bit 6 of IF1L, and bits 2 to 7 of IF1H to 0.
The interrupt request flags are set to 1 when the corresponding interrupt request is generated or an instruction is
executed. They are cleared to 0 when an instruction is executed upon acknowledgment of an interrupt request or
upon reset signal generation.
When an interrupt is acknowledged, the interrupt request flag is automatically cleared and then the interrupt
routine is entered.
IF0L, IF0H, IF1L, and IF1H are set by a 1-bit or 8-bit memory manipulation instruction. When IF0L and IF0H, and
IF1L and IF1H are combined to form 16-bit registers IF0 and IF1, they are set by a 16-bit memory manipulation
instruction.
Reset signal generation clears these registers to 00H.
Address: FFE0H After reset: 00H R/W
Symbol
IF0L
Address: FFE1H
Symbol
IF0H
Address: FFE2H
Symbol
IF1L
Address: FFE3H
Symbol
IF1H
PD78F041x only.
2. When operating a timer, serial interface, or A/D converter after standby release, operate it
Figure 17-2. Format of Interrupt Request Flag Registers (IF0L, IF0H, IF1L, IF1H)
once after clearing the interrupt request flag. An interrupt request flag may be set by noise.
TMIF010
SREIF6
TMIF52
XXIFX
<7>
<7>
<7>
7
0
0
1
After reset: 00H
After reset: 00H
After reset: 00H
No interrupt request signal is generated
Interrupt request is generated, interrupt request status
TMIF000
<6>
6
0
6
0
6
0
CHAPTER 17 INTERRUPT FUNCTIONS
R/W
R/W
R/W
TMIF50
RTCIF
<5>
<5>
User’s Manual U18698EJ1V0UD
5
0
5
0
TMIFH0
KRIF
PIF3
<4>
<4>
<4>
4
0
Interrupt request flag
TMIFH1
TMIF51
PIF2
<3>
<3>
<3>
3
0
RTCIIF
STIF0
PIF1
<2>
<2>
<2>
2
0
MCGIF
STIF6
SRIF0
PIF0
<1>
<1>
<1>
<1>
ADIF
TMHIF2
SRIF6
LVIIF
<0>
<0>
<0>
<0>
Note
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