UPD78F0535GB(T)-UEU-A NEC, UPD78F0535GB(T)-UEU-A Datasheet - Page 279

• Manufacturer Part Number: UPD78F0535GB(T)-UEU-A
• Description: 8BIT MCU, 60K FLASH, 3KB RAM, LQFP
• Manufacturer: NEC

Specifications of UPD78F0535GB(T)-UEU-A

• Controller Family/series: UPD78
• No. Of I/o's: 55
• Ram Memory Size: 3KB
• Cpu Speed: 20MHz
• No. Of Timers: 8
• No. Of Pwm: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 60KB
• Oscillator Type: External, Internal

8-bit timer counter Hn
<1> The count operation is enabled by setting the TMHEn bit to 1. The count clock starts counting no more than
<2> When the value of the 8-bit timer counter Hn matches the value of the CMP0n register, the value of the timer
<3> If the TMHEn bit is cleared to 0 while timer H is operating, the INTTMHn signal and TOHn output are set to
Remark n = 0, 1
Count clock
1 clock after the operation is enabled.
counter is cleared, and the level of the TOHn output is inverted. In addition, the INTTMHn signal is output at
the rising edge of the count clock.
the default level. If they are already at the default level before the TMHEn bit is cleared to 0, then that level
is maintained.
INTTMHn
CMP0n
TMHEn
01H ≤ N ≤ FEH
TOHn
Figure 9-10. Timing of Interval Timer/Square-Wave Output Operation (1/2)
<1>
00H
Count start
(a) Basic operation (Operation When 01H ≤ CMP0n ≤ FEH)
01H
CHAPTER 9 8-BIT TIMERS H0 AND H1
User’s Manual U17260EJ6V0UD
match interrupt occurrence,
8-bit timer counter Hn clear
Level inversion,
N
N
<2>
Clear
00H
01H
Interval time
match interrupt occurrence,
8-bit timer counter Hn clear
Level inversion,
N
<2>
Clear
00H
01H 00H
<3>
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