UPD78F0535GB(T)-UEU-A NEC, UPD78F0535GB(T)-UEU-A Datasheet - Page 458
UPD78F0535GB(T)-UEU-A
Manufacturer Part Number
UPD78F0535GB(T)-UEU-A
Description
8BIT MCU, 60K FLASH, 3KB RAM, LQFP
Manufacturer
NEC
Datasheet
1.UPD78F0535GBT-UEU-A.pdf
(773 pages)
Specifications of UPD78F0535GB(T)-UEU-A
Controller Family/series
UPD78
No. Of I/o's
55
Ram Memory Size
3KB
Cpu Speed
20MHz
No. Of Timers
8
No. Of Pwm
RoHS Compliant
Core Size
8bit
Program Memory Size
60KB
Oscillator Type
External, Internal
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An example of the processing procedure of the slave with the INTIIC0 interrupt is explained below (processing
is performed assuming that no extension code is used). The INTIIC0 interrupt checks the status, and the
following operations are performed.
<1> Communication is stopped if the stop condition is issued.
<2> If the start condition is issued, the address is checked and communication is completed if the address
<3> For data transmit/receive, only the ready flag is set. Processing returns from the interrupt with the I
Remark
Interrupt servicing completed
INTIIC0 generated
does not match.
processing returns from the interrupt (the ready flag is cleared).
remaining in the wait state.
Set ready flag
SPD0 = 1?
STD0 = 1?
<1> to <3> above correspond to <1> to <3> in Figure 17-26 Slave Operation Flowchart (2).
No
No
<3>
If the address matches, the communication mode is set, wait is cancelled, and
Figure 17-26. Slave Operation Flowchart (2)
Yes
Yes
CHAPTER 17 SERIAL INTERFACE IIC0
User’s Manual U17260EJ6V0UD
<1>
<2>
Set communication mode flag
Communication direction flag
Clear ready flag
COI0 = 1?
← TRC0
Yes
No
Clear communication direction
communication mode flag
flag, ready flag, and
2
C bus
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