GS1559CBE2 GENNUM, GS1559CBE2 Datasheet - Page 64

• Manufacturer Part Number: GS1559CBE2
• Description: IC, DES, 48.5MHZ 20BIT 1.485GBPS BGA-100
• Manufacturer: GENNUM

Specifications of GS1559CBE2

• Supply Voltage Range: 1.71V To 1.89V, 3.13V To 3.47V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: BGA
• No. Of Pins: 100
• Termination Type: SMD
• Control Interface: Serial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.12.2 Data Read and Write Timing
4.12.3 Configuration and Status Registers
SDIN
SCLK
CS
SDOUT
SDIN
SCLK
CS
R/W
R/W
t
RSV
0
t
RSV
0
RSV
MSB
RSV
RSV
D15
RSV
RSV
RSV
t
RSV
D14
3
t
RSV
3
input data
setup time
RSV
input data
setup time
RSV
D13
RSV
t
2
RSV
RSV
t
Figure 4-10: Command Word
Figure 4-11: Data Word
Read and write mode timing for the GSPI interface is shown in
Figure 4-13
When writing to the registers via the GSPI, the MSB of the data word may be
presented to SDIN immediately following the falling edge of the LSB of the
command word. All SDIN data is sampled on the rising edge of SCLK.
When reading from the registers via the GSPI, the MSB of the data word will be
available on SDOUT 12ns following the falling edge of the LSB of the command
word, and thus may be read by the host on the very next rising edge of the clock.
The remaining bits are clocked out by the GS1559 on the negative edges of SCLK.
Figure 4-12: GSPI Read Mode Timing
Figure 4-13: GSPI Write Mode Timing
Table 4-17
All of these registers are available to the host via the GSPI and are all individually
addressable.
30572 - 7
2
duty
cycle
RSV
D12
RSV
duty
cycle
RSV
A5
A5
D11
A4
A4
summarizes the GS1559's internal status and configuration registers.
respectively. The maximum SCLK frequency allowed is 6.6MHz.
May 2007
A3
t
4
D10
A3
A2
t
period
A2
4
A1
A1
D9
period
A0
A0
D8
D15
D15
t
5
D14
D14
D7
D13
D13
D12
D12
D6
D11
D11
D10
D10
t
6
D5
D9
D9
output data
hold time
D8
D8
D4
D7
D7
GS1559 Data Sheet
D6
D6
D3
D5
D5
Figure 4-12
D4
D4
D2
D3
D3
D2
D2
D1
D1
D1
64 of 73
and
D0
D0
D0
LSB