OM13005,598 NXP Semiconductors, OM13005,598 Datasheet - Page 13

• Manufacturer Part Number: OM13005,598
• Description: BOARD EVAL EM773 METER US PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13005,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6680

NXP Semiconductors
UM10415
User manual
3.4.3 System PLL control register
3.4.4 System PLL status register
3.4.5 System oscillator control register
This register connects and enables the system PLL and configures the PLL multiplier and
divider values. The PLL accepts an input frequency from 10 MHz to 25 MHz from various
clock sources. The input frequency is multiplied up to a high frequency, then divided down
to provide the actual clock used by the CPU, peripherals, and memories. The PLL can
produce a clock up to the maximum allowed for the CPU.
Table 6.
This register is a Read-only register and supplies the PLL lock status (see
Table 7.
This register configures the frequency range for the system oscillator.
Table 8.
Bit
4:0
6:5
31:7
Bit
0
31:1
Bit
0
Symbol
MSEL
PSEL
-
Symbol
LOCK
-
Symbol
BYPASS
System PLL control register (SYSPLLCTRL, address 0x4004 8008) bit description
System PLL status register (SYSPLLSTAT, address 0x4004 800C) bit description
System oscillator control register (SYSOSCCTRL, address 0x4004 8020) bit
description
All information provided in this document is subject to legal disclaimers.
Value
00000 Division ratio M = 1
...
11111
00
01
10
11
-
Value
0
1
-
Rev. 1 — 10 September 2010
Description
Feedback divider value. The division value M is the
programmed MSEL value + 1.
Division ration M = 32
Post divider ratio P. The division ratio is 2 × P.
P = 1
P = 2
P = 4
P = 8
Reserved. Do not write ones to reserved bits.
Description
PLL lock status
PLL not locked
PLL locked
Reserved
Value
0
1
Description
Bypass system oscillator
Oscillator is not bypassed.
Bypass enabled. PLL input (sys_osc_clk) is fed
directly from the XTALIN and XTALOUT pins.
Chapter 3: EM773 System configuration
UM10415
© NXP B.V. 2010. All rights reserved.
Section
Reset
value
0x000
0x00
0x0
Reset
value
0x0
0x00
Reset
value
0x0
3.9.1).
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