OM13005,598 NXP Semiconductors, OM13005,598 Datasheet - Page 178

• Manufacturer Part Number: OM13005,598
• Description: BOARD EVAL EM773 METER US PLUG
• Manufacturer: NXP Semiconductors
• Type: Other Power Managementr

Specifications of OM13005,598

• Design Resources: Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, 32-Bit
• Utilized Ic / Part: EM773FHN33,551
• Interface Type: USB
• Maximum Operating Temperature: + 150 C
• Operating Supply Voltage: 1.8 V to 3.6 V
• Product: Power Management Development Tools
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: EM773, OL2381
• Other names: 568-6680

14.1 How to read this chapter
14.2 Basic configuration
14.3 Features
14.4 Applications
UM10415
User manual
The WDT block is identical for all EM773 parts.
The WDT is configured using the following registers:
The purpose of the Watchdog is to reset the microcontroller within a reasonable amount of
time if it enters an erroneous state. When enabled, the Watchdog will generate a system
reset if the user program fails to "feed" (or reload) the Watchdog within a predetermined
amount of time.
1. Pins: The WDT uses no external pins.
2. Power: In the SYSAHBCLKCTRL register, set bit 15
3. Peripheral clock: Select the watchdog clock source
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UM10415
Chapter 14: EM773 WatchDog Timer (WDT)
Rev. 1 — 10 September 2010
peripheral clock by writing to the WDTCLKDIV register
Remark: The frequency of the watchdog oscillator is undefined after reset. The
watchdog oscillator frequency must be programmed by writing to the WDTOSCCTRL
register (see
Internally resets chip if not periodically reloaded.
Debug mode.
Enabled by software but requires a hardware reset or a Watchdog reset/interrupt to be
disabled.
Incorrect/Incomplete feed sequence causes reset/interrupt if enabled.
Flag to indicate Watchdog reset.
Programmable 24 bit timer with internal pre-scaler.
Selectable time period from (T
T
The Watchdog clock (WDCLK) source is selected in the syscon block from the
Internal RC oscillator (IRC), the main clock, or the Watchdog oscillator, see
This gives a wide range of potential timing choices for Watchdog operation under
different power reduction conditions. For increased reliability, it also provides the
ability to run the Watchdog timer from an entirely internal source that is not dependent
on an external crystal and its associated components and wiring.
WDCLK
× 4.
All information provided in this document is subject to legal disclaimers.
Table
Rev. 1 — 10 September 2010
9) before using the watchdog oscillator for the WDT.
WDCLK
× 256 × 4) to (T
Table
WDCLK
(Table
(Table
20) and enable the WDT
× 2
17).
22).
24
× 4) in multiples of
© NXP B.V. 2010. All rights reserved.
User manual
Table
178 of 310
20.