OM13005,598 NXP Semiconductors, OM13005,598 Datasheet - Page 256
OM13005,598
Manufacturer Part Number
OM13005,598
Description
BOARD EVAL EM773 METER US PLUG
Manufacturer
NXP Semiconductors
Type
Other Power Managementr
Specifications of OM13005,598
Design Resources
Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
EM773FHN33,551
Interface Type
USB
Maximum Operating Temperature
+ 150 C
Operating Supply Voltage
1.8 V to 3.6 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
EM773, OL2381
Other names
568-6680
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NXP Semiconductors
UM10415
User manual
20.4.4.3.2 Operation
20.4.4.3.3 Restrictions
20.4.4.3.4 Condition flags
20.4.4.3.5 Examples
20.4.4.4.1 Syntax
20.4.4.4.2 Operation
20.4.4.4.3 Restrictions
20.4.4.4.4 Condition flags
20.4.4.4 LDR, PC-relative
LDR, LDRB, U, LDRSB and LDRSH load the register specified by Rt with either a word,
zero extended byte, zero extended halfword, sign extended byte or sign extended
halfword value from memory.
STR, STRB and STRH store the word, least-significant byte or lower halfword contained
in the single register specified by Rt into memory.
The memory address to load from or store to is the sum of the values in the registers
specified by Rn and Rm.
In these instructions:
These instructions do not change the flags.
Load register (literal) from memory.
LDR Rt, label
where:
Loads the register specified by Rt from the word in memory specified by label.
In these instructions, label must be within 1020 bytes of the current PC and word aligned.
These instructions do not change the flags.
•
•
Rt is the register to load.
label is a PC-relative expression. See
Rt, Rn, and Rm must only specify R0-R7.
the computed memory address must be divisible by the number of bytes in the load or
store, see
STR
LDRSH R1, [R2, R3]
R0, [R5, R1]
Section
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 10 September 2010
20–20.4.3.4.
Chapter 20: Appendix EM773 ARM Cortex-M0 reference
; Store value of R0 into an address equal to
; Load a halfword from the memory address
; and write to R1.
; sum of R5 and R1
; specified by (R2 + R3), sign extend to 32-bits
Section
20–20.4.3.5.
UM10415
© NXP B.V. 2010. All rights reserved.
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