OM13005,598 NXP Semiconductors, OM13005,598 Datasheet - Page 31
![BOARD EVAL EM773 METER US PLUG](/photos/38/74/387430/om13005_sml.jpg)
OM13005,598
Manufacturer Part Number
OM13005,598
Description
BOARD EVAL EM773 METER US PLUG
Manufacturer
NXP Semiconductors
Type
Other Power Managementr
Specifications of OM13005,598
Design Resources
Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
EM773FHN33,551
Interface Type
USB
Maximum Operating Temperature
+ 150 C
Operating Supply Voltage
1.8 V to 3.6 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
EM773, OL2381
Other names
568-6680
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NXP Semiconductors
UM10415
User manual
3.7.1.1 Power configuration in Active mode
3.7.2.1 Power configuration in Sleep mode
3.7.2.2 Programming Sleep mode
3.7.2 Sleep mode
Power consumption in Active mode is determined by the following configuration choices:
In Sleep mode, the system clock to the ARM Cortex-M0 core is stopped, and execution of
instructions is suspended until either a reset or an interrupt occurs.
Peripheral functions, if selected to be clocked in the SYSAHBCLKCTRL register, continue
operation during Sleep mode and may generate interrupts to cause the processor to
resume execution. Sleep mode eliminates dynamic power used by the processor itself,
memory systems and related controllers, and internal buses. The processor state and
registers, peripheral registers, and internal SRAM values are maintained, and the logic
levels of the pins remain static.
Power consumption in Sleep mode is configured by the same settings as in Active mode:
The following steps must be performed to enter Sleep mode:
1. The DPDEN bit in the PCON register must be set to zero
2. The SLEEPDEEP bit in the ARM Cortex-M0 SCR register must be set to zero, see
3. Use the ARM Cortex-M0 Wait-For-Interrupt (WFI) instruction.
•
•
•
•
•
•
•
•
The SYSAHBCLKCTRL register controls which memories and peripherals are
running
The power to various analog blocks (PLL, oscillators, the BOD circuit, and the flash
block) can be controlled at any time individually through the PDRUNCFG register
(Table
The clock source for the system clock can be selected from the IRC (default), the
system oscillator, or the watchdog oscillator (see
The system clock frequency can be selected by the SYSPLLCTRL
SYSAHBCLKDIV register
Selected peripherals (UART, SPI0, WDT) use individual peripheral clocks with their
own clock dividers. The peripheral clocks can be shut down through the
corresponding clock divider registers
The clock remains running.
The system clock frequency remains the same as in Active mode, but the processor is
not clocked.
Analog and digital peripherals are selected as in Active mode.
(Table
37).
250).
(Table
All information provided in this document is subject to legal disclaimers.
17).
Rev. 1 — 10 September 2010
(Table
16).
(Table 18
Chapter 3: EM773 System configuration
to
Figure 3
Table
19).
(Table
and related registers).
43).
UM10415
© NXP B.V. 2010. All rights reserved.
(Table
6) and the
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