OM13005,598 NXP Semiconductors, OM13005,598 Datasheet - Page 92
![BOARD EVAL EM773 METER US PLUG](/photos/38/74/387430/om13005_sml.jpg)
OM13005,598
Manufacturer Part Number
OM13005,598
Description
BOARD EVAL EM773 METER US PLUG
Manufacturer
NXP Semiconductors
Type
Other Power Managementr
Specifications of OM13005,598
Design Resources
Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
EM773FHN33,551
Interface Type
USB
Maximum Operating Temperature
+ 150 C
Operating Supply Voltage
1.8 V to 3.6 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
EM773, OL2381
Other names
568-6680
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NXP Semiconductors
UM10415
User manual
9.6.17 UART RS485 Control register (U0RS485CTRL - 0x4000 804C)
Although
control, it is strongly suggested to let UART hardware implemented auto flow control
features take care of this, and limit the scope of TxEn to software flow control.
Table 107
Table 107. UART Transmit Enable Register (U0TER - address 0x4000 8030) bit description
The U0RS485CTRL register controls the configuration of the UART in RS-485/EIA-485
mode.
Table 108. UART RS485 Control register (U0RS485CTRL - address 0x4000 804C) bit
Bit
6:0
7
31:8 -
Bit
0
1
2
3
4
5
Symbol
NMMEN
RXDIS
AADEN
SEL
DCTRL
OINV
Symbol
-
TXEN
Table 107
describes how to use TXEn bit in order to achieve software flow control.
description
All information provided in this document is subject to legal disclaimers.
Description
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
When this bit is 1, as it is after a Reset, data written to the THR
is output on the TXD pin as soon as any preceding data has
been sent. If this bit cleared to 0 while a character is being sent,
the transmission of that character is completed, but no further
characters are sent until this bit is set again. In other words, a 0
in this bit blocks the transfer of characters from the THR or TX
FIFO into the transmit shift register. Software can clear this bit
when it detects that the a hardware-handshaking TX-permit
signal (CTS) has gone false, or with software handshaking,
when it receives an XOFF character (DC3). Software can set
this bit again when it detects that the TX-permit signal has gone
true, or when it receives an XON (DC1) character.
Reserved
Value
0
1
0
1
0
1
0
1
0
1
describes how to use TxEn bit in order to achieve hardware flow
Rev. 1 — 10 September 2010
Chapter 9: EM773 Universal Asynchronous Transmitter (UART)
Description
RS-485/EIA-485 Normal Multidrop Mode (NMM)
is disabled.
RS-485/EIA-485 Normal Multidrop Mode (NMM)
is enabled. In this mode, an address is detected
when a received byte causes the UART to set the
parity error and generate an interrupt.
The receiver is enabled.
The receiver is disabled.
Auto Address Detect (AAD) is disabled.
Auto Address Detect (AAD) is enabled.
If direction control is enabled (bit DCTRL = 1), pin
RTS is used for direction control.
If direction control is enabled (bit DCTRL = 1), pin
DTR is used for direction control.
Disable Auto Direction Control.
Enable Auto Direction Control.
This bit reverses the polarity of the direction
control signal on the RTS (or DTR) pin.
UM10415
© NXP B.V. 2010. All rights reserved.
Reset Value
NA
1
-
Reset
value
0
0
0
0
0
0
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