OM13005,598 NXP Semiconductors, OM13005,598 Datasheet - Page 229
![BOARD EVAL EM773 METER US PLUG](/photos/38/74/387430/om13005_sml.jpg)
OM13005,598
Manufacturer Part Number
OM13005,598
Description
BOARD EVAL EM773 METER US PLUG
Manufacturer
NXP Semiconductors
Type
Other Power Managementr
Specifications of OM13005,598
Design Resources
Plug Meter Schematics, Gerber Files USB Dongle Schematics, Gerber Files
Main Purpose
Power Management, Energy/Power Meter
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
EM773FHN33,551
Interface Type
USB
Maximum Operating Temperature
+ 150 C
Operating Supply Voltage
1.8 V to 3.6 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Primary Attributes
-
Secondary Attributes
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
EM773, OL2381
Other names
568-6680
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NXP Semiconductors
UM10415
User manual
20.3.1.3.3 Link Register
20.3.1.3.4 Program Counter
20.3.1.3.5 Program Status Register
On reset, the processor loads the MSP with the value from address 0x00000000.
The Link Register (LR) is register R14. It stores the return information for subroutines,
function calls, and exceptions. On reset, the LR value is Unknown.
The Program Counter (PC) is register R15. It contains the current program address. On
reset, the processor loads the PC with the value of the reset vector, which is at address
0x00000004. Bit[0] of the value is loaded into the EPSR T-bit at reset and must be 1.
The Program Status Register (PSR) combines:
These registers are mutually exclusive bitfields in the 32-bit PSR. The PSR bit
assignments are:
Access these registers individually or as a combination of any two or all three registers,
using the register name as an argument to the MSR or MRS instructions. For example:
The PSR combinations and attributes are:
Table 218. PSR register combinations
[1]
[2]
Register
PSR
IEPSR
IAPSR
EAPSR
APSR
EPSR
Fig 54. APSR, IPSR, EPSR register bit assignments
•
•
•
•
•
IPSR
Application Program Status Register (APSR)
Interrupt Program Status Register (IPSR)
Execution Program Status Register (EPSR).
read all of the registers using PSR with the MRS instruction
write to the APSR using APSR with the MSR instruction.
The processor ignores writes to the IPSR bits.
Reads of the EPSR bits return zero, and the processor ignores writes to the these bits
31 30 29 28 27
N Z C V
Reserved
All information provided in this document is subject to legal disclaimers.
Type
RW
RO
RW
RW
Rev. 1 — 10 September 2010
[1][2]
[1]
[2]
25 24 23
T
Chapter 20: Appendix EM773 ARM Cortex-M0 reference
Combination
APSR, EPSR, and IPSR
EPSR and IPSR
APSR and IPSR
APSR and EPSR
Reserved
Reserved
Reserved
UM10415
© NXP B.V. 2010. All rights reserved.
6
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