EP3C16F256I7 Altera, EP3C16F256I7 Datasheet - Page 11

• Manufacturer Part Number: EP3C16F256I7
• Description: Cyclone III
• Manufacturer: Altera

Contents
Chapter 12. Remote System Upgrade With Cyclone III Devices
Chapter 13. SEU Mitigation in Cyclone III Devices
Chapter 14. IEEE 1149.1 (JTAG) Boundary-Scan Testing for Cyclone III Devices
Altera Corporation
Document Revision History ............................................................................................................... 11–8
Introduction .......................................................................................................................................... 12–1
Functional Description ........................................................................................................................ 12–1
Remote System Upgrade Mode ......................................................................................................... 12–5
Dedicated Remote System Upgrade Circuitry ................................................................................ 12–8
Quartus II Software Support ............................................................................................................ 12–20
Conclusion .......................................................................................................................................... 12–20
Document Revision History ............................................................................................................. 12–21
Introduction .......................................................................................................................................... 13–1
Error Detection Fundamentals .......................................................................................................... 13–1
Configuration Error Detection ........................................................................................................... 13–2
User Mode
Error Detection ..................................................................................................................................... 13–2
Automated Single Event Upset Detection ....................................................................................... 13–3
Error Detection Pin Description ........................................................................................................ 13–4
CRC_ERROR Pin ................................................................................................................................. 13–4
Error Detection Block .......................................................................................................................... 13–4
Error Detection Timing ....................................................................................................................... 13–6
Software Support ................................................................................................................................. 13–8
Recovering from CRC Errors ............................................................................................................. 13–9
Conclusion .......................................................................................................................................... 13–10
Document Revision History ............................................................................................................. 13–11
Introduction .......................................................................................................................................... 14–1
IEEE Std. 1149.1 BST Architecture .................................................................................................... 14–2
IEEE Std. 1149.1 Boundary-Scan Register ........................................................................................ 14–4
IEEE Std. 1149.1 BST Operation Control .......................................................................................... 14–7
Configuration Image Types .......................................................................................................... 12–5
Overview ......................................................................................................................................... 12–5
Remote Update Mode .................................................................................................................... 12–5
Remote System Upgrade Registers ............................................................................................ 12–10
Remote System Upgrade State Machine ................................................................................... 12–15
User Watchdog Timer .................................................................................................................. 12–16
Interface Signals between Remote System Upgrade Circuitry and Cyclone III Device Logic
Array .............................................................................................................................................. 12–17
altremote_update Megafunction ................................................................................................ 12–20
Remote System Upgrade Atom .................................................................................................. 12–20
Error Detection Registers .............................................................................................................. 13–5
Boundary-Scan Cells of a Cyclone III Device I/O Pin .............................................................. 14–5
SAMPLE/PRELOAD Instruction Mode ................................................................................... 14–13
EXTEST Instruction Mode .......................................................................................................... 14–14
BYPASS Instruction Mode .......................................................................................................... 14–16
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