EP3C16F256I7 Altera, EP3C16F256I7 Datasheet - Page 130

• Manufacturer Part Number: EP3C16F256I7
• Description: Cyclone III
• Manufacturer: Altera

Clock Networks and PLLs in Cyclone III Devices
Figure 6–17. Automatic Switchover Upon Clock Loss Detection
Note to
(1)
6–30
Cyclone III Device Handbook, Volume 1
Switchover is enabled on the falling edge of INCLK0 or INCLK1, depending on which clock is available.
In this figure, the switchover is enabled on the falling edge of INCLK1.
Figure
PLL Clock
6–17:
clk0bad
clk1bad
muxout
inclk0
inclk1
Output
refclk
fbclk
Manual Override
When using automatic switchover, you can switch input clocks by using
the manual override feature with the clkswitch input.
Figure 6–18
feature when controlled by clkswitch. In this case, both clock sources
are functional and inclk0 is selected as the reference clock. The
clkswitch goes high, which starts the switchover sequence. On the
falling edge of inclk0, the counter's reference clock, muxout, is gated off
to prevent any clock glitching. On the falling edge of inclk1, the
reference clock multiplexer switches from inclk0 to inclk1 as the PLL
reference. This is also when the activeclock signal changes to indicate
which clock is currently feeding the PLL.
shows an example of a waveform illustrating the switchover
(1)
Note (1)
Altera Corporation- Preliminary
March 2007