XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 111

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.1
B
IT
N
3-2
UMBER
D/E Timeslot Source
Select
B
IT
N
AME
B
IT
R/W
T
YPE
D/E Timeslot Source Select:
These READ/WRITE bit-fields permit the user to select data
destination of D or E channel (D/E Timeslot) for the ISDN Pri-
mary Rate Interface.
The ISDN Primary Rate Interface (ISDN I.431) can carry B chan-
nel, D channel, E channel and H channel. B channel has a bit
rate of 64Kbit/s and is equivalent to a DS0 channel in T1 used
for payload transmission. D channel has a bit rate of 64Kbit/s
and is used primarily for signaling transmission. E channel has a
bit rate of 64Kbit/s and is used for signaling for circuit switching.
It is used only with multiple-access configuration. H channel has
bit rates of 384Kbit/s, 1536Kbit/s for T1 primary rate, and
1920Kbit/s for E1 primary rate.
The signaling information presented on D or E channels can be
directed to several destinations. The user can send the signaling
information to the Receive Serial Data via the RxSer_n pins. The
user can also direct the signaling data to the Receive LAPD con-
troller. The signaling information can be extracted from the
Receive LAPD controller using microprocessor access. Finally,
the user can send the signaling information to Fraction T1 output
via the RxFrT1_n pins.
When these bits are set to 00:
The data link bits extracted form the D or E channel of incoming
DS1 frame are inserted into the Receive Serial Data Output
Interface via the RxSer_n pins.
When these bits are set to 01:
The data link bits extracted form the D or E channel of incoming
DS1 frame are inserted into the Receive HDLC Controller. The
user can read the Receive LAPD controller using microproces-
sor access.
When these bits are set to 10:
The data link bits extracted form the D or E channel of incoming
DS1 frame are inserted into the Receive Fractional T1 Output
Interface via the RxFrT1_n pins.
When these bits are set to 11:
The data link bits extracted form the D or E channel of incoming
DS1 frame are inserted into the Receive Serial Data Output
Interface via the RxSer_n pins.
91
B
IT
D
ESCRIPTION
OCTAL T1/E1/J1 FRAMER
XRT84L38