XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 446

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT84L38
OCTAL T1/E1/J1 FRAMER
The XRT84L38 can configure any one or ones of the thirty-two E1 channels to be D or E channels except for
Channel number 0. D channel is used primarily for data link applications. E channel is used primarily for
signaling for circuit switching with multiple access configurations.
The Transmit Conditioning Select [3:0] bits of the Transmit Channel Control Register (TCCR) of each channel
determine whether that particular channel is configured as D or E channel. These bits also determine what
type of data or signaling conditioning is applied to each channel.
TRANSMIT CHANNEL CONTROL REGISTER (TCCR) (INDIRECT ADDRESS = 0XN2H, 0X00H - 0X1FH)
If the Transmit Conditioning Select [3:0] bits of the Transmit Channel Control Register of a particular timeslot
are set to 1111, that timeslot is configured as a D or E timeslot.
N
14.1.5
The Transmit BOS Processor handles transmission of BOS messages through the E1 data link channel. It
determines how many repetitions a certain BOS message will be transmitted. It also inserts BOS IDLE flag
sequence and ABORT sequence to be transmitted on the data link channel. Please see Section ? for
descriptions of BOS message format and how to transmit BOS message.
14.1.6
The Transmit LAPD controller implements the Message-Oriented protocol based on ITU Recommendation
Q.921 Link Access Procedures on the D-channel (LAPD) type of protocol. It provides the following functions:
•
•
•
•
•
•
Two 96-byte buffers in shared memory are allocated for LAPD transmitter to reduce the frequency of
microprocessor interrupts and alleviate the response time requirement for microprocessor to handle each
interrupt. There are no restrictions on the length of the message. However the 96-byte buffer is deep enough to
hold one entire LAPD path or test signal identification message. Please see Section ? for descriptions of MOS
message format and how to configure the LAPD Controller to transmit MOS message.
14.2
14.2.1
XRT84L38 detects and extracts data link information from incoming E1 frames. The data link information in E1
framing format mode can be extracted to:
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•
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The extracted data link information is routed to the E1 Receive Overhead Output Interface and the E1 Receive
Serial Output Interface no matter whether the E1 Receive HDLC Controller module is activated or not.
OTE
N
Zero stuffing
T1/E1 transmitter interface
Transmit message buffer access
Frame check sequence generation
IDLE flag insertion
ABORT sequence generation
E1 Receive Overhead Output Interface Block
E1 Receive HDLC Controller
E1 Receive Serial Output Interface
UMBER
B
3-0
: Timeslot 0 can never be configured as D or E timeslot.
IT
E1 Receive HDLC Controller Block
Transmit BOS (Bit Oriented Signaling) Processor
Transmit MOS (Message Oriented Signaling) or LAPD Controller
Description of the E1 Receive HDLC Controller Block
Transmit Condi-
tioning Select
B
IT
N
AME
B
IT
R/W
T
YPE
1111 - This channel is configured as D or E timeslot.
426
B
IT
D
ESCRIPTION
REV. 1.0.1