XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 184

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT84L38
OCTAL T1/E1/J1 FRAMER
The XRT84L38 Framer is equipped with a sophisticated Interrupt Servicing Structure. This Interrupt Structure
includes an Interrupt Request output pin INT, numerous Interrupt Enable Registers and numerous Interrupt
Status Registers.
The Interrupt Servicing Structure, within the XRT84L38 Framer contains three levels of hierarchy:
•
•
•
The Framer Interrupt Structure has been carefully designed to allow the user to quickly determine the exact
source of this interrupt (with minimal latency) which will aid the μ C/ μ P in determining the which interrupt
service routine to call up in order to eliminate or properly respond to the condition(s) causing the interrupt.
The XRT84L38 Framer comes equipped with registers to support the servicing of this wide array of potential
"interrupt request" sources.
General Flow of Interrupt Servicing
When any of the conditions presented in
generates an interrupt request to the μ P/ μ C by asserting the active-low interrupt request output pin, INT.
Shortly after the local μ C/ μ P has detected the activated INT signal, it will enter into the appropriate user-
supplied interrupt service routine. The first task for the μ P/ μ C, while running this interrupt service routine, may
1.7
The Framer Level
The Block Level
The Source Level.
HDLC Controller Block
Alarm & Error Block
T1/E1 Frame Block
I
NTERRUPT
Slip Buffer Block
T
The Interrupt Structure within the Framer
Framer Level
ABLE
25: L
B
LOCK
IST OF THE
Table 25
Loss of RxLineClk Signal· One Second Interrupt
Transmit HDLC - Start of Transmission
Receive HDLC - Start of Reception
Transmit HDLC - End of Transmission
Receive HDLC - End of Reception
FCS Error
Receipt of Abort Sequence
Receipt of Idle Sequence
Slip Buffer Full
Slip Buffer Empty
Slip Buffer - Slip
Receipt of CAS Multi-frame Yellow Alarm
Detection of Loss of Signal Condition
Detection of Line Code Violation
Change in Receive Loss of Framer Condition
Change in Receive AIS Condition
Receipt of FAS Frame Yellow Alarm
Change in CAS Multi-Frame Alignment
Change in National Bits· Change in CAS Signaling Bits
Change in FAS Frame Alignment· Change in the "In Frame" Condition
Detection of "Frame Mimicking Data"
Detection of Sync (CRC-4/CRC-6) Errors
Detection of Framing Bit Errors
P
OSSIBLE
lists the possible conditions that can generate interrupts.
C
ONDITIONS THAT CAN
Table 25
164
occur, (if their Interrupt is enabled), then the Framer
I
NTERRUPTING
G
ENERATE
C
ONDITION
I
NTERRUPTS
,
IN EACH
F
RAMER
REV. 1.0.1