XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 273

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.1
The following table shows configurations of the OSCCLK Frequency Select [1:0] bits of the Clock Select
Register.
CLOCK SELECT REGISTER (CSR) (INDIRECT ADDRESS = 0XN0H, 0X00H)
The Transmit Serial clock signal pin (TxSerClk_n) is output from the framer. The framer outputs a 2.048MHz
clock through this pin to the local Terminal Equipment. The Transmit Single-frame Synchronization signal and
the Transmit Multi-frame Synchronization signal are also automatically configured to be output signals.
The Transmit Single-frame Synchronization signal should pulse HIGH for one E1 bit period (488ns) at the last
bit position of each E1 frame. By triggering on the HIGH pulse on the Transmit Single-frame Synchronization
signal, the local Terminal Equipment can identify the end of an E1 frame and should start inserting payload
data of the next E1 frame to the framer.
The Transmit Multi-frame Synchronization signal should pulse HIGH for one E1 bit period (488ns) at the last bit
position of the last frame of an E1 multi-frame. By triggering on the HIGH pulse on the Transmit Multi-frame
Synchronization signal, the local Terminal Equipment can identify the end of an E1 super-frame and should
start inserting payload data of the next E1 multi-frame into the framer.
N
UMBER
B
3-2
IT
Frequency
B
OSCCLK
IT
Select
N
AME
B
IT
R/W
T
YPE
These two READ/WRITE bit-fields permit the user to select internal clock divid-
ing logic of the framer depending on the frequency of incoming oscillator clock
(OSCCLK). The frequency of internal clock used by the framer should be
16.384MHz.
00 - The framer will internally divide the incoming OSCCLK by one. Therefore,
the external oscillator clock applied to the OSCCLK pin should be 16.384MHz.
01 - The framer will internally divide the incoming OSCCLK by two. Therefore,
the external oscillator clock applied to the OSCCLK pin should be 32.768MHz.
10 - The framer will internally divide the incoming OSCCLK by four. Therefore,
the external oscillator clock applied to the OSCCLK pin should be 65.536MHz.
253
B
IT
D
ESCRIPTION
OCTAL T1/E1/J1 FRAMER
XRT84L38