XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 332

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT84L38
OCTAL T1/E1/J1 FRAMER
The table below shows configuration of the Transmit Data Link Source Select [1:0] bits of the Synchronization
MUX Register (SMR).
SYNCHRONIZATION MUX REGISTER (SMR) (INDIRECT ADDRESS = 0XN0H, 0X09H)
If the Transmit Data Link Source Select bits of the Transmit Data Link Select Register are set to 10, the
Transmit Overhead Input Interface Block becomes input source of the FDL bits.
The XRT84L38 allows the user to decide on the following:
•
•
The Transmit Sa Data Link Select bits of the Transmit Signaling and Data Link Select Register (TSDLSR)
determine which ones of the National bits are configured as Data Link bits in E1 framing format mode.
Depending upon the configuration of the Transmit Signaling and Data Link Select Register, either of the
following cases may exists:
•
•
The table below shows configuration of the Transmit Sa Data Link Select bits of the Transmit Signaling and
Data Link Select Register (TSDLSR).
TRANSMIT SIGNALING AND DATA LINK SELECT REGISTER (TSDLSR) (INDIRECT ADDRESS = 0XN0H,
0X0AH)
For every Sa bit that is selected to carry Data Link information, the Transmit Overhead Input Interface will
supply a clock pulse, via the TxOHClk_n output pin, such that:
N
N
How many of the National Bits will be used to carry the Data Link information bits
Which of these National Bits will be used to carry the Data Link information bits.
None of the National bits are used to transport the Data Link information bits (That is, data link channel of
XRT84L38 is inactive).
Any combination of between 1 and all 5 of the National bits can be selected to transport the Data Link
information bits.
UMBER
UMBER
B
3-2
B
7
6
5
4
3
IT
IT
Source Select [1:0]
Transmit Data Link
Transmit Sa8 Data
Transmit Sa7 Data
Transmit Sa6 Data
Transmit Sa5 Data
Transmit Sa4 Data
Link Select
Link Select
Link Select
Link Select
Link Select
B
B
IT
IT
N
N
AME
AME
B
B
IT
IT
R/W
R/W
R/W
R/W
R/W
R/W
T
T
YPE
YPE
00 - The Sa4 through Sa8 National bits are inserted into the framer
through the Transmit Serial Data input Interface via the TxSer_n pins.
01 - The Sa4 through Sa8 National bits are inserted into the framer
through the Transmit LAPD Controller.
10 - The Sa4 through Sa8 National bits are inserted into the framer
through the Transmit Overhead Input Interface via the TxOH_n pins.
11 - The Sa4 through Sa8 National bits are inserted into the framer through
the Transmit Serial Data input Interface via the TxSer_n pins.
0 - Source of the Sa8 Nation bit is not from the data link interface.
1 - Source the Sa8 National bit from the data link interface.
0 - Source of the Sa7 Nation bit is not from the data link interface.
1 - Source the Sa7 National bit from the data link interface.
0 - Source of the Sa6 Nation bit is not from the data link interface.
1 - Source the Sa6 National bit from the data link interface.
0 - Source of the Sa5 Nation bit is not from the data link interface.
1 - Source the Sa5 National bit from the data link interface.
0 - Source of the Sa4 Nation bit is not from the data link interface.
1 - Source the Sa4 National bit from the data link interface.
312
B
B
IT
IT
D
D
ESCRIPTION
ESCRIPTION
REV. 1.0.1