XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 344

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT84L38
OCTAL T1/E1/J1 FRAMER
The table below shows the four most significant bits of the Transmit Signaling Control Register.
TRANSMIT SIGNALING CONTROL REGISTER (TSCR) (INDIRECT ADDRESS = 0XN2H, 0X40H - 0X57H)
The XRT84L38 framer can be configure to insert signaling bits provided by external equipment through the
TxSig_n pins. This pin is a multiplexed I/O pin with two functions:
•
•
When the Transmit Fractional DS1 bit of the Transmit Interface Control Register (TICR) is set to 0, this pin is
configured as TxTSb[0]_n pin, it outputs bit 0 of the timeslot number of the DS1 PCM data that is transmitting.
When the Transmit Fractional DS1 bit of the Transmit Interface Control Register (TICR) is set to 1, this pin is
configured as TxSig_n pin, it acts as an input source for the signaling bits to be transmitted in the outbound
DS1 frames.
Figure 111
timeslot coincides with Bit 5 of the PCM data; Signaling Bit B coincides with Bit 6 of the PCM data; Signaling Bit
C coincides with Bit 7 of the PCM data and Signaling Bit D coincides with Bit 8 (LSB) of the PCM data.
F
9.5.2.2
IGURE
N
TxTSb[0]_n - Transmit Timeslot Number Bit [0] Output pin
TxSig_n - Transmit Signaling Input pin
UMBER
TxSerClk (INV)
B
7
6
5
4
IT
111. T
TxSerClk
TxSer
TxSig
below is a timing diagram of the TxSig_n input pin. Please note that the Signaling Bit A of a certain
Insert Signaling Bits from TxSig_n Pin
Signaling Bit A
Signaling Bit B
Signaling Bit C
Signaling Bit D
IMING
B
IT
N
D
F
AME
IAGRAM OF THE
Timeslot 0
Input Data
A B
B
IT
R/W
R/W
R/W
R/W
C
T
YPE
D
T
X
S
IG
This bit is used to store Signaling Bit A that is sent as the least significant
bit of timeslot of frame number 6.
This bit is used to store Signaling Bit B that is sent as the least significant
bit of timeslot of frame number 12.
This bit is used to store Signaling Bit C that is sent as the least significant
bit of timeslot of frame number 18.
This bit is used to store Signaling Bit D that is sent as the least significant
bit of timeslot of frame number 24.
_
N
I
NPUT
Input Data
Timeslot 5
324
A B
C
D
Timeslot 6
Input Data
B
IT
D
A B
ESCRIPTION
C
D
Timeslot 23
Input Data
A B
REV. 1.0.1
C
D
F