XRT84L38IB Exar Corporation, XRT84L38IB Datasheet - Page 59

• Manufacturer Part Number: XRT84L38IB
• Description: Network Controller & Processor ICs 8 Ch T1/E1 Framer
• Manufacturer: Exar Corporation

Specifications of XRT84L38IB

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.1
Figure 5
during an Intel-type Programmed I/O Write Operation.
If the Framer is interfaced to a Motorola-type µC/µP (e.g., the MC680X0 family, etc.), it should be configured to
operate in the Motorola mode.
Whenever a Motorola-type µC/µP wishes to read the contents of a register or some location within the Receive
LAPD Message or Receive OAM Cell Buffer, within the Framer, it should do the following.
F
4. After allowing the data on the Address Bus pins to settle, by waiting the appropriate Address Setup time,
5. Next, the µC/µP should indicate that this current bus cycle is a Write Operation by toggling the
6. The µC/µP should then place the byte or word that it intends to write into the target register on the bi-direc-
7. After waiting the appropriate amount of time for the data on the bi-directional data bus to settle, the µC/µP
1. Assert the ALE_AS (Address-Strobe) input pin by toggling it “Low”. This step enables the Address Bus
2. Place the address of the target register or buffer location within the Framer, on the Address Bus input pins,
3. At the same time, the Address Decoding circuitry within the user's system should assert the CS (Chip
4. After allowing the data on the Address Bus pins to settle, by waiting the appropriate Address Setup time,
1.3.2.2.2
1.3.2.2.2.1
IGURE
b.
a.
the µC/µP should toggle the ALE_AS input pin "Low". This step causes the Framer to latch the contents of
the Address Bus into its internal circuitry. At this point, the address of the register or buffer location within
the Framer, has been selected.
(Write Strobe) input pin "Low". This action also enables the bi-directional data bus input drivers of the
Framer.
tional data bus, D[7:0].
should toggle the
input drivers within the Microprocessor Interface Block of the Framer.
A[6:0].
Select) input pin of the Framer, by toggling it "Low". This action enables further communication between
the µC/µP and the Framer Microprocessor Interface block.
the µC/µP should toggle the ALE_AS input pin "High". This step causes the Framer to latch the contents of
the Address Bus into its internal circuitry. At this point, the address of the register or buffer location within
the Framer has been selected.
It latches the contents of the bi-directional data bus into the Framer Microprocessor Interface block.
It terminates the write cycle.
5. I
presents a timing diagram which illustrates the behavior of the Microprocessor Interface signals,
RDY_DTACK
NTEL
WR_R/W
ALE_AS
A[6:0]
D[7:0]
Motorola Mode Programmed I/O Access
µP I
RD
CS
Motorola Mode Read Cycle
NTERFACE
WR_R/W
(Write Strobe) input pin "High". This action accomplishes two things:
S
IGNALS DURING
P
ROGRAMMED
Address of Target Register
Data to be Written
39
I/O W
RITE
O
PERATION
OCTAL T1/E1/J1 FRAMER
XRT84L38
WR_R/W