HFIXF1110CC.B2 Q E000 Intel, HFIXF1110CC.B2 Q E000 Datasheet - Page 140

• Manufacturer Part Number: HFIXF1110CC.B2 Q E000
• Manufacturer: Intel

Specifications of HFIXF1110CC.B2 Q E000

• Number Of Transceivers: 1
• Screening Level: Commercial
• Mounting: Surface Mount
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Lead Free Status / RoHS Status: Not Compliant

Intel
07-Oct-2005
140
®
Table 74. RX Packet Filter Control ($ Port_Index + 0x19) (Sheet 2 of 2)
Table 75. Port Multicast Address Low ($ Port_Index + 0x1A)
Table 76. Port Multicast Address High ($ Port_Index + 0x1B)
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
1. R = Read Only; CoR = Clear on Read; W = Write; R/W = Read/Write
2. Jumbo frames (1519 - 9600 bytes), matching the filter conditions, which would cause the frame to be
3. Frames are dropped only when the appropriate bits are set in the RX FIFO Errored Frame Drop Enable
1. R = Read Only; CoR = Clear on Read; W = Write; R/W = Read/Write
1. R = Read Only; CoR = Clear on Read; W = Write; R/W = Read/Write
31:16
Bit
31:0
15:0
2
1
0
dropped by the RX FIFO, will not be dropped. Instead, jumbo frames that are marked to be dropped by the
RX FIFO, based on the filter setting in this register, will still be sent across the SPI4-2 interface, but will be
marked as an EOP abort frame. Thus, jumbo frames matching the filter conditions will not be counted in the
RX FIFO Number of Frames Removed Register because they are not removed by the RX FIFO. Only
standard packet sizes (64 - 1518 bytes) meeting the filter conditions set in this register will actually be
dropped by the RX FIFO and counted in the RX FIFO Number of Frames Removed.
Register
SPI4-2 interface and marked as EOP abort frames.
Bit
Bit
B/Cast Drop En
M/Cast Match En
U/Cast Match En
Intel
Port Multicast
Address Low
Reserved
Port Multicast
Address High
(Table 92 on page
®
Name
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Name
Name
2
Order Number: 250210, Revision: 009
2
2
This bit enables a Global filter on Broadcast frames.
When B/CastDropEn = 0, all broadcast frames are
passed to the SPI4-2 Interface.
When B/CastDropEn = 1, all broadcast frames are
dropped.
This bit enables a filter on multicast frames. If this bit =
0, all multicast frames are good and are passed to the
SPI4-2 Interface.
If this bit = 1, only multicast frames with a destination
address that matches the PortMulticastAddress is
forwarded. All other multicast frames are dropped.
This bit enables a filter on unicast frames.
If this bit = 0, all unicast frames are good and are
passed to the SPI4-2 interface.
If this bit = 1, only unicast frames with a destination
address that matches the Station Address is
forwarded. All other unicast frames are dropped.
NOTE: The VLAN filter overrides the Unicast filter.
160). When the appropriate bits are not set, the frames are sent across the
This address is used to compare against
multicast frames at the receiving side if multicast
filtering is enabled.
This register contains bits 31:0 of the address.
Reserved
This address is used to compare against
multicast frames at the receiving side if Multicast
filtering is enabled.
This register contains bits 47:32 of the address.
Thus, a VLAN frame cannot be filtered based
on the Unicast address.
3
Description
Description
Description
3
3
Type
Type
R/W
R/W
Type
R
R/W
R/W
R/W
1
1
1
0x00000000
Default
Default
0x0000
0x0000
Default
Datasheet
0
0
0