HFIXF1110CC.B2 Q E000 Intel, HFIXF1110CC.B2 Q E000 Datasheet - Page 149

• Manufacturer Part Number: HFIXF1110CC.B2 Q E000
• Manufacturer: Intel

Specifications of HFIXF1110CC.B2 Q E000

• Number Of Transceivers: 1
• Screening Level: Commercial
• Mounting: Surface Mount
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Lead Free Status / RoHS Status: Not Compliant

8.5.4
Datasheet
Table 79. Port Enable ($ 0x500)
Global Status and Configuration Register Overview
Table 79
Registers.
Register Description: A control register for each port in the IXF1110. Port ID = bit position in
the register. To make a port active, the bit must be set High (for example, port 4 active implies
register value = 0001.0000). Setting the bit to 0 disables the port. The default state for this
register is for all 10 ports to be active.
1. R = Read Only; CoR = Clear on Read; W = Write; R/W = Read/Write
2. If a port is disabled mid-packet on the receive side in SerDes mode, the RX Stats will not update for that
31:10
packet due to power-down of SerDes when the port is disabled.
Bit
9
8
7
6
5
4
3
2
1
0
through
Intel
Reserved
Port 9 Enable
Port 8 Enable
Port 7 Enable
Port 6 Enable
Port 5 Enable
Port 4 Enable
Port 3 Enable
Port 2 Enable
Port 1 Enable
Port 0 Enable
®
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Table 86 on page 152
Name
Order Number: 250210, Revision: 009
Reserved
Port 9
0 = Disable
1 = Enable
Port 8
0 = Disable
1 = Enable
Port 7
0 = Disable
1 = Enable
Port 6
0 = Disable
1 = Enable
Port 5
0 = Disable
1 = Enable
Port 4
0 = Disable
1 = Enable
Port 3
0 = Disable
1 = Enable
Port 2
0 = Disable
1 = Enable
Port 1
0 = Disable
1 = Enable
Port 0
0 = Disable
1 = Enable
Intel
®
provide an overview of the Global Control and Status
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
Description
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
1
0x000003FF
07-Oct-2005
0x00000
Default
1
1
1
1
1
1
1
1
1
1
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