FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 288
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FW82801DBM S L6DN
Manufacturer Part Number
FW82801DBM S L6DN
Description
Manufacturer
Intel
Datasheet
1.FW82801DBM_S_L6DN.pdf
(615 pages)
Specifications of FW82801DBM S L6DN
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LAN Controller Registers (B1:D8:F0)
288
Table 7-6. Statistical Counters (Sheet 2 of 2)
The Statistical Counters are initially set to zero by the ICH4’s integrated LAN Controller after
reset. They cannot be preset to anything other than zero. The LAN Controller increments the
counters by internally reading them, incrementing them and writing them back. This process is
invisible to the processor and PCI bus. In addition, the counters adhere to the following rules:
The processor can access the counters by issuing a Dump Statistical Counters SCB command. This
provides a “snapshot”, in main memory, of the internal LAN Controller statistical counters. The
LAN Controller supports 21 counters. The dump could consist of the either 16, 19, or all 21
counters, depending on the status of the Extended Statistics Counters and TCO Statistics
configuration bits in the Configuration command.
•
•
•
48
52
56
60
64
68
72
76
78
ID
The counters are wrap-around counters. After reaching FFFFFFFFh the counters wrap around
to 0.
The LAN Controller updates the required counters for each frame. It is possible for more than
one counter to be updated as multiple errors can occur in a single frame.
The counters are 32 bits wide and their behavior is fully compatible with the IEEE 802.1
standard. The LAN Controller supports all mandatory and recommend statistics functions
through the status of the receive header and directly through these Statistical Counters.
Receive Resource Errors
Receive Overrun Errors
Receive Collision Detect
(CDT)
Receive Short Frame Errors
Flow Control Transmit Pause
Flow Control Receive Pause
Flow Control Receive
Unsupported
Receive TCO Frames
Transmit TCO Frames
Counter
This counter contains the number of good frames discarded due to
unavailability of resources. Frames intended for a host whose
Receive Unit is in the No Resources state fall into this category. If the
LAN* Controller is configured to Save Bad Frames and the status of
the received frame indicates that it is a bad frame, the Receive
Resource Errors counter is not updated.
This counter contains the number of frames known to be lost
because the local system bus was not available. If the traffic problem
persists for more than one frame, the frames that follow the first are
also lost; however, because there is no lost frame indicator, they are
not counted.
This counter contains the number of frames that encountered
collisions during frame reception.
This counter contains the number of received frames that are shorter
than the minimum frame length. The Receive Short Frame Errors
counter is mutually exclusive to the Receive Alignment Errors and
Receive CRC Errors counters. A short frame will always increment
only the Receive Short Frame Errors counter.
This counter contains the number of Flow Control frames transmitted
by the LAN Controller. This count includes both the Xoff frames
transmitted and Xon (PAUSE(0)) frames transmitted.
This counter contains the number of Flow Control frames received by
the LAN Controller. This count includes both the Xoff frames
received and Xon (PAUSE(0)) frames received.
This counter contains the number of MAC Control frames received
by the LAN Controller that are not Flow Control Pause frames. These
frames are valid MAC control frames that have the predefined MAC
control Type value and a valid address but has an unsupported
opcode.
This counter contains the number of TCO packets received by the
LAN Controller.
This counter contains the number of TCO packets transmitted.
Description
Intel
®
82801DBM ICH4-M Datasheet
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