FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 57

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

2.17
Intel
®
Table 2-17. AC’97 Link Signals
82801DBM ICH4-M Datasheet
AC’97 Link
NOTE: An integrated pull-down resistor on AC_BIT_CLK is enabled when either:
AC_RST#
AC_SYNC
AC_BIT_CLK
AC_SDOUT
AC_SDIN[2:0]
Name
- The ACLINK Shutoff bit in the AC’97 Global Control Register is set to 1, or
- Both Function 5 and Function 6 of Device 31 are disabled.
Otherwise, the integrated pull-down resistor is disabled.
Type
O
O
O
I
I
AC97 Reset: This signal is a master hardware reset to external Codec(s).
AC97 Sync: This signal is a 48 kHz fixed rate sample sync to the Codec(s).
AC97 Bit Clock: This signal is a 12.288 MHz serial data clock generated by
the external Codec(s). This signal has an integrated pull-down resistor (see
Note at the end of the table).
AC97 Serial Data Out: Serial TDM data output to the Codec(s).
NOTE: AC_SDOUT is sampled at the rising edge of PWROK as a functional
AC97 Serial Data In 2:0: These signals are Serial TDM data inputs from the
three Codecs.
strap. See
Section 2.20.1
Description
for more details.
Signal Description
57