FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 604

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

Table A-3. Intel
604
Auxiliary Status
Auxiliary Control
PCM In Buffer Descriptor list
Base Address Register
PCM In Current Index Value
PCM In Last Valid Index
PCM In Status Register
PCM In Position In Current Buffer
PCM In Prefetched Index Value
PCM In Control Register
PCM Out Buffer Descriptor list
Base Address Register
PCM Out Current Index Value
PCM Out Last Valid Index
PCM Out Status Register
PCM Out Position In Current
Buffer
PCM Out Prefetched Index Value
PCM Out Control Register
Mic. In Buffer Descriptor list Base
Address Register
Mic. In Current Index Value
Mic. In Last Valid Index
Mic. In Status Register
Mic In Position In Current Buffer
Mic. In Prefetched Index Value
Mic. In Control Register
Global Control
Global Status
Codec Access Semaphore
Register
Mic. 2 Buffer Descriptor list Base
Address Register
Mic. 2 Current Index Value
NAMBAR is set at Section 14.1.11, “NABMBAR—Native Audio Bus Mastering Base Address Register (Audio—D31:F5)”
MBBAR is set at Section 14.1.13, “MBBAR—Bus Master Base Address Register (Audio—D31:F5)” on page 14-496
Register Name
®
ICH4 Variable I/O Registers (Sheet 4 of 6)
AC’97 Audio I/O Registers at NAMBAR + Offset
40–43h
Offset
AC’97 Audio I/O Registers at MBBAR + Offset
0Ch
0Dh
2Ch
0Ah
0Bh
1Ah
1Bh
2Ah
2Bh
00h
04h
05h
06h
08h
10h
14h
15h
16h
18h
20h
24h
25h
26h
28h
30h
34h
44h
Section 13.2.11, “AUX_STS—Auxiliary Status Register” on page 13-483
Section 13.2.12, “AUX_CTL—Auxiliary Control Register” on page 13-484
Section 14.2.1, “x_BDBAR—Buffer Descriptor Base Address Register” on
page 14-504
Section 14.2.2, “x_CIV—Current Index Value Register” on page 14-505
Section 14.2.3, “x_LVI—Last Valid Index Register” on page 14-505
Section 14.2.4, “x_SR—Status Register” on page 14-506
Section 14.2.5, “x_PICB—Position In Current Buffer Register” on
page 14-507
Section 14.2.6, “x_PIV—Prefetched Index Value Register” on page 14-507
Section 14.2.7, “x_CR—Control Register” on page 14-508
Section 14.2.1, “x_BDBAR—Buffer Descriptor Base Address Register” on
page 14-504
Section 14.2.2, “x_CIV—Current Index Value Register” on page 14-505
Section 14.2.3, “x_LVI—Last Valid Index Register” on page 14-505
Section 14.2.4, “x_SR—Status Register” on page 14-506
Section 14.2.5, “x_PICB—Position In Current Buffer Register” on
page 14-507
Section 14.2.6, “x_PIV—Prefetched Index Value Register” on page 14-507
Section 14.2.7, “x_CR—Control Register” on page 14-508
Section 14.2.1, “x_BDBAR—Buffer Descriptor Base Address Register” on
page 14-504
Section 14.2.2, “x_CIV—Current Index Value Register” on page 14-505
Section 14.2.3, “x_LVI—Last Valid Index Register” on page 14-505
Section 14.2.4, “x_SR—Status Register” on page 14-506
Section 14.2.5, “x_PICB—Position In Current Buffer Register” on
page 14-507
Section 14.2.6, “x_PIV—Prefetched Index Value Register” on page 14-507
Section 14.2.7, “x_CR—Control Register” on page 14-508
Section 14.2.8, “GLOB_CNT—Global Control Register” on page 14-509
Section 14.2.9, “GLOB_STA—Global Status Register” on page 14-510
Section 14.2.10, “CAS—Codec Access Semaphore Register” on
page 14-512
Section 14.2.1, “x_BDBAR—Buffer Descriptor Base Address Register” on
page 14-504
Section 14.2.2, “x_CIV—Current Index Value Register” on page 14-505
on page 14-495
Datasheet Location
Intel
®
82801DBM ICH4-M Datasheet
Register Index