FW82801DBM S L6DN Intel, FW82801DBM S L6DN Datasheet - Page 304

• Manufacturer Part Number: FW82801DBM S L6DN
• Manufacturer: Intel

Specifications of FW82801DBM S L6DN

• Lead Free Status / RoHS Status: Not Compliant

Hub Interface to PCI Bridge Registers (D30:F0)
8.1.31
304
ERR_STS—Error Status Register (HUB-PCI—D30:F0)
Offset Address:
Default Value:
Lockable:
This register records the cause of system errors in Device 30. The actual assertion of SERR# is
enabled via the PCI Command register.
7:3
1:0
Bit
2
Reserved
SERR# Due to Received Target Abort (SERR_RTA) — R/W.
0 = Software clears this bit by writing a 1 to it.
1 = The ICH4 sets this bit when the ICH4 receives a target abort. If SERR_EN, the ICH4 will also
Reserved
generate an SERR# when SERR_RTA is set.
92h
00h
No
Description
Attribute:
Size:
Power Well:
Intel
®
82801DBM ICH4-M Datasheet
R/W
8 bit
Core