NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 102
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NH82801HEM S LA5R
Manufacturer Part Number
NH82801HEM S LA5R
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LA5R.pdf
(890 pages)
Specifications of NH82801HEM S LA5R
Lead Free Status / RoHS Status
Compliant
- Current page: 102 of 890
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3.4
Table 35.
102
SATA_CLKP, SATA_CLKN
DMI_CLKP, DMI_CLKN
PERp[6:1], PERn[6:1]
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54
LDRQ1# / GPIO23
GPIO[37,36,19]
LAN_RXD[2:0]
SATA[3:0]RXP,
SATA[3:0]GP /
SATA[3:0]RXN
Signal Name
DMI[3:0]RXP,
DMI[3:0]RXN
SATARBIAS#
SATA[5:4]GP
GLAN_CLK
GLAN_RXp
GLAN_RXn
Power Planes for Input Signals
Table 35
as what device drives the signal at various times. Valid states include:
High
Low
Static: Will be high or low, but will not change
Driven: Will be high or low, and is allowed to change
Running: For input clocks
Power Plane for Input Signals for Desktop Configurations (Sheet 1 of 3)
LDRQ0#
REQ0#,
PCICLK
SERR#
PME#
and
1, 3
1, 3
1, 3
1
2
Table 36
Power Well
Suspend
Suspend
Suspend
Suspend
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
shows the power plane associated with each input signal, as well
Platform LAN Connect Interface
Gigabit LAN Connect Interface
External Pull-up/Pull-down
LAN Connect Component
LAN Connect Component
SATA Interface
USB Interface
LPC Interface
PCI Express*
Driver During Reset
PCI Express* Device
Gigabit Lan Connect
PCI Bus Peripherals
External Pull-down
External Device or
PCI Bus
Clock Generator
Clock Generator
Clock Generator
External Pull up
Internal Pull-up
DMI
LPC Devices
LPC Devices
Component
SATA Drive
(G)MCH
Running
Running
Running
Driven
Driven
Driven
Driven
Driven
Driven
Driven
Driven
Driven
Driven
High
High
High
S1
Intel
®
Intel
Driven
Driven
Driven
Driven
ICH8 Family Datasheet
S3
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
®
ICH8 Pin States
S4/S5
Driven
Driven
Driven
Driven
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
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