NH82801HEM S LA5R Intel, NH82801HEM S LA5R Datasheet - Page 221
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NH82801HEM S LA5R
Manufacturer Part Number
NH82801HEM S LA5R
Description
Manufacturer
Intel
Datasheet
1.NH82801HEM_S_LA5R.pdf
(890 pages)
Specifications of NH82801HEM S LA5R
Lead Free Status / RoHS Status
Compliant
- Current page: 221 of 890
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Functional Description
Table 87.
Intel
®
ICH8 Family Datasheet
Table 87
registers as well as bits in the associated Port Status and Control register.
Debug Port Behavior
OWNER_CNT
0
1
1
1
1
1
1
1
shows the debug port behavior related to the state of bits in the debug
ENABLED_CT
X
0
1
1
1
1
1
1
Enable
Port
X
X
0
0
1
1
1
1
Run /
Stop
X
X
0
1
0
0
1
1
Suspend
X
X
X
X
0
1
0
1
Debug port is not being used.
Normal operation.
Debug port is not being used.
Normal operation.
Debug port in Mode 1. SYNC
keepalives sent plus debug
traffic
Debug port in Mode 2. SOF
(and only SOF) is sent as
keepalive. Debug traffic is also
sent. Note that no other
normal traffic is sent out this
port, because the port is not
enabled.
Invalid. Host controller driver
should never put controller
into this state (enabled, not
running and not suspended).
Port is suspended. No debug
traffic sent.
Debug port in Mode 2. Debug
traffic is interspersed with
normal traffic.
Port is suspended. No debug
traffic sent.
Debug Port Behavior
221
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