AMD-8132BLCT AMD (ADVANCED MICRO DEVICES), AMD-8132BLCT Datasheet - Page 33

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AMD-8132BLCT

Manufacturer Part Number
AMD-8132BLCT
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AMD-8132BLCT

Lead Free Status / RoHS Status
Not Compliant
26792 Rev. 3.07 July 2005
The TPS* hot-plug power controller controls PCI RESET_L to each slot. The AMD-8132 tunnel
[B,A]_RESET_L signals are connected to the TPS* hot-plug power controller serial interface control signal,
SORR_L of the TPS2340A or HP_RST[B,A]# of the TPS2342.
Some operating systems require that each configuration space bus number provide a separate PME_L signal to
a general purpose set of PME_L status bits provided by the platform system management logic. The
AMD-8132 tunnel internal PME_L signals are associated with the power management configuration registers
Dev[B,A]:0x[9C:98]. Both registers are observed by software on the primary side of the PCI bridges and are
on the same bus number, so the two AMD-8132 tunnel internal signals are connected and observed on the
PME_L signal.
Since the slots are observed by software on the AMD-8132 tunnel secondary bus (which is a different bus
number from the primary side); each bridge should provide a separate PME_L signal to the platform system
management logic that logically connects to all the slots behind the bridge. The TPS* hot-plug power
controller’s PME_L inputs connect to the PME_L signal of each hot-plug slot. The TPS* hot-plug power
controller’s PME_L outputs for one bridge should be connected and passed to the platform system
management logic.
Figure 5. System Diagram: PME_L Signals
The slot signals used to communicate the speed, M66EN and PCIXCAP capability, and presence of an adapter
card (PRSNT[1:2]_L) are isolated from the other slots in a hot-plug implementation and directly connected
from the slot connector to their associated TPS*. The state of these signals is provided to the
AMD-8132 tunnel through the serial interface. The AMD-8132 tunnel, in turn, makes the state of these signals
available to system software. The [B,A]_PCIXCAP and [B,A]_M66EN pins on the AMD-8132 tunnel are not
used for sensing speed and mode. The AMD-8132 tunnel [B,A]_PCIXCAP pins are used as an external power
controller serial interface.
The connection and function of the M66EN signal is different for the TPS2340A and the TPS2342.
Chapter 1
• If the TPS2340A is used, the connection and function is unique in a hot-plug implementation. M66EN is
driven as an output of the AMD-8132 tunnel. Isolation switch control is driven by CLKEN_L rather than
BUSEN_L, unlike other PCI/PCI-X control signals. In a hot-plug configuration, the AMD-8132 tunnel
[B,A]_M66EN pin is configured as an open drain output. It is driven low by the AMD-8132 tunnel if it is
determined that the bus is to run at 33 MHz (conventional PCI mode), as indicated in
SHPC[B,A]:x10[MODE].
Management Logic
AMD-8132
Platform System
Tunnel
PME_L
TM
3.3V
3.3VA
Functional Operation
PMEO_L
Controller PME_L(n)
PMEO_L
Controller
AMD-8132™ HyperTransport™ PCI-X
Power
Power
PME_L(n+3)
PME_L(n+1)
PME_L(n+2)
Bridge A, Slot (n+3)
Bridge A, Slot (n+1)
Bridge A, Slot (n+2)
Bridge A, Slot (n)
®
2.0 Tunnel Data Sheet
33

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