AMD-8132BLCT AMD (ADVANCED MICRO DEVICES), AMD-8132BLCT Datasheet - Page 56

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AMD-8132BLCT

Manufacturer Part Number
AMD-8132BLCT
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AMD-8132BLCT

Lead Free Status / RoHS Status
Not Compliant
AMD-8132™ HyperTransport™ PCI-X
56
Pin Name
Alternate Function. Description.
[B,A]_PCLK[4]
[B,A]_BUSEN_L. When Dev[B,A]:0x48[HPEN] and Dev[B,A]:0x40[SSS_L] are asserted, this
is the BUSEN_L input. See section 1.3.7.2.
VIO[B,A]_OVERRIDE_DELAY. When Dev[B,A]:0x48[HPEN] is not asserted and
Dev[B,A]:0x40[SSS_L] is asserted (low), this is the VIO[B,A]_OVERRIDE_DELAY input. See
section 7.1.4.
[B,A]_REQ_L0
[B,A]_P_GNT_L. If Dev[B,A]:0x48[EXTARB_L] is asserted (low), this signal is used as the
preemptable GNT_L from the arbiter.
[B,A]_REQ_L1
[B,A]_NP_GNT_L. If Dev[B,A]:0x48[EXTARB_L] is asserted (low), this signal is used as the
non-preemptable GNT_L from the arbiter.
[B,A]_VIOSEL. When Dev[B,A]:0x48:[HPEN] is not asserted and Dev[B,A]:0x40[SSS_L] is
asserted (low), this is an output and is the [B,A]_VIOSEL signal for the VIO[B,A] power
controller. See section 7.1.4.
CLKEN_L. When Dev[B,A]:0x48[HPEN] and Dev[B,A]:0x40[SSS_L] are asserted, this is the
CLKEN_L input.
[B,A]_REQ_L4
[B,A]_HPSOLC. When a hot-plug controller is connected to the bridge this is an output:
[B,A]_RESET_L
[B,A]_HP_RST_L. This a reset output to the TPS2342.
[B,A]_HPSORR_L. This is a reset output to the TPS2340A.
Note: The function does not change for the different hot-plug controllers, but the controllers name the
HPSIC
A_HP_CLK. When DevA:0x48[HP_IS_TPS2342] is asserted, this signal is the hot-plug serial
bus clock for bus A.
HPSIL_L
B_HP_CLK. When DevA:0x48[HP_IS_TPS2342] is asserted, this signal is the hot-plug serial
bus clock for bus B.
• [B,A]_HPSOLC for a TPS2340A compatible controller. See section 1.3.7.
• [B,A]_HP_LC for a TPS2342 compatible controller. See section 1.3.7.
signal differently .
®
2.0 Tunnel Data Sheet
Signal Descriptions
26792 Rev. 3.07 July 2005
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Chapter 2
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