LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 101
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LSI53C040-160QFP
Manufacturer Part Number
LSI53C040-160QFP
Description
Manufacturer
LSI
Datasheet
1.LSI53C040-160QFP.pdf
(212 pages)
Specifications of LSI53C040-160QFP
Mounting
Surface Mount
Lead Free Status / RoHS Status
Supplier Unconfirmed
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Chapter 6
Two-Wire Serial
Registers
This chapter contains descriptions of the LSI53C040 Two-Wire Serial
interface registers. The SCSI/DMA registers, SFF-8067 registers,
Miscellaneous registers, and System registers are described in
Chapter
bits that are programmed to a binary one, while the terms “reset” or “clear”
are used to refer to bits that are programmed to binary zero. Any bits
marked as reserved should always be written to zero; mask all information
read from them. Unless otherwise indicated, all bits in registers are active
high, that is, the feature is enabled by setting the bit. The bottom row of
every register diagram shows the default bit values, which are enabled
after the chip is powered on or reset.
Figure 6.1
Figure 6.1
LSI53C040 Enclosure Services Processor Technical Manual
0xFCFF
0xFDFF
0xFC1F
0xFEFF
0xFC00
0xFC20
0xFD00
0xFFFF
0xFE00
0xFF00
5,
summarizes the entire LSI53C040 register set.
Chapter
Two-Wire Serial Interface Registers
Register Set Overview
SCSI Core and DMA Registers
Miscellaneous Registers
SFF-8067 Registers
System Registers
7, and
Chapter
8. The term “set” is used to refer to
Chapter
6-1
4,
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