LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 94

• Manufacturer Part Number: LSI53C040-160QFP
• Manufacturer: LSI

Specifications of LSI53C040-160QFP

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table 5.1
5-2
31
SFF-8067 Interface Registers
The SFF-8067 Interface register set allows observation and control of the
two SFF-8067 interface ports which are designated as port 0 and port 1.
The registers associated with port 0 occupy addresses 0xFC20 through
0xFC27 and the registers associated with port 1 occupy addresses
0xFC28 through 0xFC2F. To conserve space, the register descriptions
only appear once in this chapter. The two applicable locations are
separated by a slash (/), with the port 0 address listed first.
Table
graphical form.
SFF-8067 Registers
Manual Data Output (MDATA0)
Manual Data Output (MDATA1)
Port Control/Status (PCST0)
Port Control/Status (PCST1)
Physical Address (PHAD0)
Physical Address (PHAD1)
5.1, the register map, summarizes the SFF-8067 registers in
Write Data (WDATA0)
Write Data (WDATA1)
Read Data (RDATA0)
Read Data (RDATA1)
Live ESI (LESI0)
Live ESI (LESI1)
16 15
Reserved
Reserved
0 Port
0
0
0
0
0
0
–
1
1
1
1
1
1
–
0xFC2E–0xFC2F
0xFC26–0xFC27
Address
0xFC2A
0xFC2B
0xFC2C
0xFC2D
0xFC20
0xFC21
0xFC22
0xFC23
0xFC24
0xFC25
0xFC28
0xFC29