LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 127

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LSI53C040-160QFP

Manufacturer Part Number
LSI53C040-160QFP
Description
Manufacturer
LSI
Datasheet

Specifications of LSI53C040-160QFP

Mounting
Surface Mount
Lead Free Status / RoHS Status
Supplier Unconfirmed
Chapter 8
System Registers
This chapter contains descriptions of the LSI53C040 System registers.
The SCSI/DMA registers, SFF-8067 registers, Two-Wire Serial registers,
and Miscellaneous registers are described in
Chapter
a binary one, while the term reset or clear is used to refer to bits that are
programmed to binary zero. Any bits marked as reserved should always
be written to zero; mask all information read from them. Reserved bit
functions may be changed at any time. Unless otherwise indicated, all
bits in registers are active high, that is, the feature is enabled by setting
the bit. The bottom row of every register diagram shows the default bit
values, which are enabled after the chip is powered on or reset.
Figure 8.1
Figure 8.1
LSI53C040 Enclosure Services Processor Technical Manual
0xFCFF
0xFDFF
0xFC1F
0xFEFF
0xFC00
0xFC20
0xFD00
0xFFFF
0xFE00
0xFF00
7. The term set is used to refer to bits that are programmed to
summarizes the entire LSI53C040 register set.
Two-Wire Serial Interface Registers
Register Set Overview
SCSI Core and DMA Registers
Miscellaneous Registers
SFF-8067 Registers
System Registers
Chapter 4
through
8-1

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