LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 121

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LSI53C040-160QFP

Manufacturer Part Number
LSI53C040-160QFP
Description
Manufacturer
LSI
Datasheet

Specifications of LSI53C040-160QFP

Mounting
Surface Mount
Lead Free Status / RoHS Status
Supplier Unconfirmed
Register: 0xFE09
Timer 2 Control (T2C)
Read/Write
T2EXP
T2RUN
T2CLR
T2PS
R
T2IEN
T2EXP
7
0
T2RUN
6
0
Timer 2 Expired (read only)
A value of 1 in the T2EXP bit indicates that the timer has
expired and an interrupt has been generated if the T2IEN
bit was set when the timer expired. The interrupt can be
cleared by setting the T2CLR bit.
Timer 2 Run
A value of 1 in the T2RUN bit allows the timer to advance.
A value of 0 stops timer advancement.
Timer 2 Clear
A value of 1 in the T2CLR bit clears the timer. A value of
0 allows the timer to advance beyond the clear state.
Timer 2 Prescaler
A value of 1 in the T2PS bit selects the additional divide
by 100 secondary divider chain, yielding a timer range of
0.5 ms to 128 ms with a resolution of 0.5 ms per step
(with a 40 MHz clock). A value of 0 bypasses the
secondary divider chain, yielding a timer range of 5 s to
1.280 ms with a resolution of 5 s per step.
Reserved
Timer 2 Interrupt Enable
A value of 1 in the T2IEN bit enables the timer’s ability to
interrupt the microcontroller core (through the
Status (ISR)
cleared upon chip reset.
T2CLR
5
0
register, 0xFE04) upon expiration. This bit is
T2PS
4
0
3
x
R
x
1
x
Interrupt
T2IEN
0
0
[3:1]
7-11
7
6
5
4
0

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