LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 131

• Manufacturer Part Number: LSI53C040-160QFP
• Manufacturer: LSI

Specifications of LSI53C040-160QFP

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Register: 0xFF03
Power-On Configuration One (POC1)
Read Only
This register is not affected by a soft reset.
R
POC1_6
POC1_5
A15
R
7
POC1_6
A14
6
LSI53C040 address decode logic will automatically
provide the first branch instruction to the microcontroller
whenever it fetches from address 0x0000 through
0x0002. The values in bits 0 and 1 define the destination
address for this branch instruction, according to
Table
addressing, see
Table 8.2 Automatic Branch Destination Address
The reset value of these bits matches the TTL voltage
levels on the AD0 and AD1 pins on reset. These pins
have internal pull-down resistors, so if no external pull-up
resistor is used, the reset value is 0, and the first
microcontroller instruction will be fetched from address
0x0000. If an external pull-up resistor is used, the reset
value is 1.
Reserved
This bit should remain clear (0) for normal operation.
Power-On Configuration 1_6
The reset value of this bit matches the TTL voltage level
on the A14 pin on reset.
Power-On Configuration 1_5
The reset value of this bit matches the TTL voltage level
on the A13 pin on reset.
POC1_5
FIBD1
A13
8.2. For more information on automatic branch
5
1
1
0
0
POC1_4
A12
4
Chapter
FIBD0
DLSEL
1
0
1
0
A11
3
2.
DLADR2
A10
2
Fetched from 0x0000
Branch Destination
DLADR1
0x8000
0x4000
0x0033
A9
1
DLADR0
A8
0
8-5
7
6
5