LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 105

• Manufacturer Part Number: LSI53C040-160QFP
• Manufacturer: LSI

Specifications of LSI53C040-160QFP

• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Supplier Unconfirmed

Register: 0xFD01/0xFD03
Control Register Writes
Write Only
PIN
ES0
ES[1:2]
ENI
STA
PIN
7
0
ES0
6
0
start data flowing. Each operation will activate the PIN bit
located in the Two-Wire Control register [0xFD01/0xFD03
(ES0=1)].
Pending Interrupt
Setting this bit clears the interrupt and all of the status
bits.
Enable Serial Output
This bit enables the Two-Wire Serial bus I/O. When low
(0), register access is available for initialization. If high
(1), then communication with the serial shift register S0
and status register S1 are accessible.
Register Selection Bits
These bits select the Two-Wire Serial register that is
read/written by accessing the Two-Wire Serial interface 0
register location.
External Interrupt Enable
Setting this bit enables the interrupt output to the
microcontroller when the PIN bit (0xFD01/0xFD03, bit 7)
is cleared (0). It causes the corresponding bit to be set in
the
interrupt is not masked in the
register.
Start
When set, this bit signifies that the byte located in the
Two-Wire Register 0xFD00/0xFD02 [(ES0, ES1, ES2 =
ES0
0
0
1
Interrupt Status (ISR)
5
0
ES[1:2]
ES1
0
1
0
4
0
ES2
0
0
0
ENI
3
0
register, if the Two-Wire Serial
Description
R/W Own Register
R/W Clock Register
R/W Data Register
Interrupt Mask (IMR)
STA
2
0
STO
1
0
ACK
0
0
[5:4]
6-5
7
6
3
2