LSI53C040-160QFP LSI, LSI53C040-160QFP Datasheet - Page 144

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LSI53C040-160QFP

Manufacturer Part Number
LSI53C040-160QFP
Description
Manufacturer
LSI
Datasheet

Specifications of LSI53C040-160QFP

Mounting
Surface Mount
Lead Free Status / RoHS Status
Supplier Unconfirmed
8-18
Register: 0xFF21
Multipurpose I/O Bank 3 Enable (MPE3)
Read/Write
R
MPE3_[3:0]
System Registers
7
0
0
Reserved
Multipurpose I/O Bank 3 Enable
These bits control the output enables on the I/O pins
MPIO3_0, MPIO3_1, MPIO3_2, and MPIO3_3. A value of
1 turns on the pin driver, and a value of 0 3-states the
pin. Because the value in this register powers up to all
zeros, the pins will initially be 3-stated at power-up.
These pins also have internal 100 A pull-down resistors,
which can be disabled with the
Pull-down Enable (MPPE3)
When the SPEN bit (0xFF05, bit 1) is set, the MPIO3_2
pin is mapped to the TXD serial port function of the
microcontroller core, and the MPIO3_3 pin is mapped to
the RXD serial port function of the microcontroller core.
When the EIEN bit (0xFF05, bit 0) is set, the MPIO3_0
pin is mapped to the EXS0_INT external interrupt
function of the microcontroller core and the MPIO3_1 pin
is mapped to the EXS1_INT external interrupt function of
the microcontroller core.
R
0
4
0
3
0
register (0xFF25).
Multipurpose I/O Bank 3
0
MPE3_[3:0]
0
0
0
[7:4]
[3:0]

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